The present invention relates generally to an optimized memory architecture for computer systems and, more particularly, to integrated circuits that implement a memory subsystem that is comprised of internal memory and control for external memory. The invention includes one or more shared high-bandwidth memory subsystems, each coupled over a plurality of buses to a display subsystem, a central processing unit (CPU) subsystem, input/output (I/O) buses and other controllers. Additional buffers and multiplexers are used for the subsystems to further optimize system performance.

Computer system controller having internal memory and external memory control

A method and system for processing graphics data in a computer system are disclosed. The method and system including providing a general-purpose processor and providing a vector co-processor coupled with the general-purpose processor. The general-purpose processor includes an instruction queue for holding a plurality of instructions. The vector co-processor is for processing at least a portion of the graphics data using a portion of the plurality of instructions. The vector co-processor is capable of performing a plurality of mathematical operations in parallel. The plurality of instructions is provided using software written in a general-purpose programming language.

Method and system for providing a flexible and efficient processor for use in a graphics processing system

Among several systems from the UWGSP (University of Washington Graphics System Processor) series, two recent architectures were designed for imaging and graphics, One of them, UWGSP3, has already been completed and is being used for selected applications, while the other one, UWGSP4, is being implemented now.These two systems use parallel and pipelined architectures for high performance graphics operations. UWGSP3 uses only commercially available of-the-shelf chips, and consists of a TMS34082 graphics system processor and four TMS34082 floating point coprocessor that can be configured into pipelined or SIMD modes depending on the algorithm. UWGSP4, however, uses dedicated ASIC (Application Specific IC) chips for higher performance, and consists of two main computational parts: a parallel vector processor with 16 vector processing units, used mainly for image processing, and a graphics subsystem which utilizes a parallel pipelined architecture for image synthesis.IN this paper, the computer graphics aspects of both UWGSP3 and UWGSP4 will be described.

/pdf/two-widely-different-architectural-approaches-to-computer-5a2xj6zwy0.pdf

Two widely-different architectural approaches to computer image generation

A method and system for processing graphics data in a computer system are disclosed. The method and system including providing a general-purpose processor and providing a vector co-processor compled with the general-purpose processor. The general-purpose processor includes an instruction queue for holding a plurality of instructions. The vector co-processor is for processing at least a portion of the graphics data using a portion of the plurality of instructions. The vector co-processor is capable of performing a plurality of mathematical operations in parallel. The plurality of instructions is provided using software written in a general-purpose programming language.

Flexible and efficient processor for use in image processing

L'invention concerne un procede et un systeme permettant de traiter des donnees graphiques dans un systeme informatique. Ce procede et ce systeme consistent a fournir un processeur polyvalent, et un co-processeur de vecteur couple audit processeur polyvalent. Le processeur polyvalent comprend une file d'attente d'instructions contenant une pluralite d'instructions. Le co-processeur de vecteur sert a traiter au moins une partie des donnees graphiques au moyen d'une partie des instructions. Il est capable d'executer une pluralite d'operations mathematiques en parallele. La pluralite d'instructions est fournie au moyen d'un logiciel ecrit en langage de programmation polyvalent.

Procede et systeme permettant d'obtenir un processeur souple et efficace utilise dans un traitement graphique

UWGSP4 (University of Washington Graphics System Processor) consists of four parts: a parallel vector processor, a shared-memory system, an interconnection network, and a graphics subsystem. The parallel vector processor was provided mainly for imaging and general-purpose computing, whereas the main functions of the graphics subsystem are to generate realistic three-dimensional images and to draw the display screen. Among the four parts, the shared memory and the interconnection network were designed to fully support the parallel vector processor and graphics subsystem so as to yield high sustained performance. A discussion is presented of the architecture of UWGSP4, simulated performance figures for several imaging and graphics algorithms, and applications areas. >

/pdf/a-high-performance-parallel-computing-system-for-imaging-and-55fqu8kw2l.pdf

A high performance parallel computing system for imaging and graphics

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A high performance parallel computing system for imaging and graphics