Sung-Soo Chi
SK Hynix
32 Papers
86 Citations
Sung-Soo Chi is an academic researcher from SK Hynix. The author has contributed to research in topics: Signal & Semiconductor memory. The author has an hindex of 6, co-authored 32 publications. Previous affiliations of Sung-Soo Chi include Kookmin University.
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Papers
Patent
Semiconductor memory device and refresh control method thereof
Sung-Yub Lee,Sung-Soo Chi +1 more
- 16 Apr 2015
TL;DR: In this paper, a refresh operation for a first adjacent word line group of a target word line of the plurality of word lines is performed after the first refresh operation, in response to a smart refresh command.
13
Patent
Internal voltage generator
Sung-Soo Chi
- 12 Mar 2007
TL;DR: In this article, an internal voltage generation device includes a plurality of output nodes, a bit line precharge voltage generation unit, a first voltage drop unit for transferring the bit line charge voltage to a first output node after decreasing the bitline pre charge voltage by a second voltage drop amount in response to a test mode signal, wherein the second voltage dropped amount is greater than the first voltage dropping amount.
9
Patent
Semiconductor memory device for reducing power consumption
Sung-Soo Chi,Jae-Jin Lee +1 more
- 28 Dec 2007
TL;DR: In this paper, a semiconductor memory device which includes a voltage supplying unit for outputting a power source voltage as a driving source signal during a predetermined time, and then outputting high voltage as the driving source signals in response to a driving control signal activated in response of an address signal was described.
7
Patent
Fuse circuit and repair control circuit using the same
Sung-Soo Chi,Ki-Chang Kwean +1 more
- 15 Jun 2010
TL;DR: In this paper, a fuse circuit includes a fuse driving unit, a separation/connection unit, and a voltage equalization unit, which are configured to drive an output terminal in response to a fuse reset signal, depending on data programmed in a fuse.
7
Patent
Memory and memory system including the same
Sung-Soo Chi
- 17 Dec 2013
TL;DR: In this article, a memory includes a first cell block comprising a plurality of first word lines and one or more first redundancy word lines for replacing at least one of the plurality of second word lines.
6