Stephen Busch
Texas Instruments
14 Papers
211 Citations
Stephen Busch is an academic researcher from Texas Instruments. The author has contributed to research in topics: Register file & Stack register. The author has an hindex of 3, co-authored 14 publications.
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Papers
Patent
High-performance, scalable mutlicore hardware and software system
William Johnson,Murali Chinnakonda,Jeffrey L. Nye,Toshio Nagata,John W. Glotzbach,Hamid R. Sheikh,Ajay Jayaraj,Stephen Busch,Shalini Gupta,Robert J. Nychka,David H. Bartley,Ganesh Sundararajan +11 more
- 14 Sep 2011
TL;DR: In this paper, the authors propose a system where serial source code is automatically converted into parallel source code, and a processing cluster is reconfigured to accommodate the parallelized code based on an allocation of memory and compute resources.
171
Patent
System and method for maintaining maximum input rate while up-scaling an image vertically
Frederic Jean Noraz,Shashank Dabral,Stephen Busch +2 more
- 17 Dec 2010
TL;DR: In this article, a triple line buffer is coupled to the receiving module that stores the pixel data in response to a write control signal from control logic, which is operated as a circular buffer.
20
Patent
Dynamic priority management of memory access
Serge Lasserre,Marouane Berrada,Stephen Busch,Denis R. Beaudoin +3 more
- 08 Nov 2012
TL;DR: In this article, a system includes multiple master devices and at least one memory refresh scheduler, and when a master device needs higher priority for memory access, the master device sends a dynamic priority signal to the memory refresh task scheduler and in response, the refresh task policy for issuing refresh commands changes.
7
Patent
Master circuits having dynamic priority leads coupled with memory controller
Serge Lasserre,Marouane Berrada,Stephen Busch,Denis R. Beaudoin +3 more
- 08 Nov 2012
TL;DR: In this article, a system includes multiple master devices and at least one memory refresh scheduler, and when a master device needs higher priority for memory access, the master device sends a dynamic priority signal to the memory refresh task scheduler and in response, the refresh task policy for issuing refresh commands changes.
3
Patent
Control node for a processing cluster
William Johnson,John W. Glotzbach,Hamid R. Sheikh,Ajay Jayaraj,Stephen Busch,Murali Chinnakonda,Jeffrey L. Nye,Toshio Nagata,Shalini Gupta,Robert J. Nychka,David H. Bartley,Ganesh Sundararajan +11 more
- 18 Nov 2011
TL;DR: In this paper, a control node is coupled with a plurality of partition message pipelines (6134-1 to 6134-R, 6136-1-to-6136-R and 6138-1 -to 6138 -R) to communicate with a message bus.
3