Shuming Chen
National University of Defense Technology
124 Papers
401 Citations
Shuming Chen is an academic researcher from National University of Defense Technology. The author has contributed to research in topics: SIMD & Multi-core processor. The author has an hindex of 11, co-authored 124 publications. Previous affiliations of Shuming Chen include University of Defence.
Chat about Author
Papers
Supporting distributed shared memory on multi-core network-on-chips using a dual microcoded controller
Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen +3 more
- 08 Mar 2010
TL;DR: Results show that, when the system size is scaled up, the delay overhead incurred by the controller may become less significant when compared with the network delay, and the delay efficiency of the DSM solution is close to hardware solutions on average but still have all the flexibility of software solutions.
54
A Highly Efficient Parallel Algorithm for H.264 Encoder Based on Macro-Block Region Partition
Shuwei Sun,Dong Wang,Shuming Chen +2 more
- 26 Sep 2007
TL;DR: Simulation results show that the proposed MBRP parallel algorithm can achieve higher speedups compared to previous approaches, and the encoding quality is the same as JM 10.2.
46
FT-Matrix: A Coordination-aware Architecture for Signal Processing
Shuming Chen,Yaohua Wang,Sheng Liu,Jianghua Wan,Chen Haiyan,Hengzhu Liu,Kai Zhang,Liu Xiangyuan,Xi Ning +8 more
TL;DR: The FT-Matrix architecture is proposed, which improves the coordination of traditional vector-SIMD architectures from three aspects: the cooperation between the scalar and SIMD unit is refined with the dynamic coupling execution scheme, the communication among SIMD lanes is enhanced with the matrix-style communication, and data sharing among vector memory banks is accomplished by the unaligned vector memory accessing scheme.
30
Recoil-Ion-Induced Single Event Upsets in Nanometer CMOS SRAM Under Low-Energy Proton Radiation
TL;DR: In this paper, low-energy (<10 MeV) proton-induced single event upsets (SEUs) were investigated through proton and heavy ion experiments on a 65 nm CMOS bulk SRAM.
27
Patent
Local space shared memory method of heterogeneous multi-kernel microprocessor
Xing Fang,Shuming Chen,Yang Guo,Pengyong Ma,Dong Wang,Xiao Ji +5 more
- 12 Apr 2006
TL;DR: In this article, a method for sharing and storing local spaces of heterogeneous multi-kernel microprocessors is described, where the in-chip shared storage spaces are organized to a shared storage pool with multiple storages.
21