The proliferation of processors, environments, and constraints on systems has cast compiler technology into a wider variety of settings, changing the compiler and compiler writer's role. No longer is execution speed the sole criterion for judging compiled code. Today, code might be judged on how small it is, how much power it consumes, how well it compresses, or how many page faults it generates. In this evolving environment, the task of building a successful compiler relies upon the compiler writer's ability to balance and blend algorithms, engineering insights, and careful planning. Today's compiler writer must choose a path through a design space that is filled with diverse alternatives, each with distinct costs, advantages, and complexities. "Engineering a Compiler" explores this design space by presenting some of the ways these problems have been solved, and the constraints that made each of those solutions attractive. By understanding the parameters of the problem and their impact on compiler design, the authors hope to convey both the depth of the problems and the breadth of possible solutions. Their goal is to cover a broad enough selection of material to show readers that real tradeoffs exist, and that the impact of those choices can be both subtle and far-reaching. Authors Keith Cooper and Linda Torczon convey both the art and the science of compiler construction and show best practice algorithms for the major passes of a compiler. Their text re-balances the curriculum for an introductory course in compiler construction to reflect the issues that arise in current practice. This work: focuses on the back end of the compiler - reflecting the focus of research and development over the last decade; uses the well-developed theory from scanning and parsing to introduce concepts that play a critical role in optimization and code generation; introduces the student to optimization through data-flow analysis, SSA form, and a selection of scalar optimizations; builds on this background to teach modern methods in code generation: instruction selection, instruction scheduling, and register allocation; presents examples in several different programming languages in order to best illustrate the concept; and, provides end-of-chapter exercises, with on-line solutions available to instructors.

Engineering a Compiler

An important correctness criterion for software running on embedded microcontrollers is stack safety: a guarantee that the call stack does not overflow. Our first contribution is a method for statically guaranteeing stack safety of interrupt-driven embedded software using an approach based on context-sensitive dataflow analysis of object code. We have implemented a prototype stack analysis tool that targets software for Atmel AVR microcontrollers and tested it on embedded applications compiled from up to 30,000 lines of C. We experimentally validate the accuracy of the tool, which runs in under 10 sec on the largest programs that we tested. The second contribution of this paper is the development of two novel ways to reduce stack memory requirements of embedded software.

Eliminating stack overflow by abstract interpretation

Form of Control Expression % Abstract Form of Control Expression % others 32.4 ! function-call 3.8 object 15.5 object < integer-constant 2.2 object == object 8.9 object > integer-constant 1.8 ! object 7.4 function-call == object 1.6 function-call 7.4 object > object 1.4 expression 5.7 object != integer-constant 1.3 object != object 4.2 function-call == integer-constant 1.2 object == integer-constant 4.0 object < object 1.1 January 30, 2008 v 1.1 15 6.8.4 Selection statements 1740 selection-statements Fu nc tio n de fin iti on s 1 10 100 1,000 10,000 0 25 50 75 100 × × if • • else switch × × ××××××××××××××××××××××××××××××× ×××××× × ××× × ××××× ×× ×××× × ×× × × × × × × ××× × × ××× ×× × ××× × × × ××× × ×

The New C Standard (Excerpted material) An Economic and Cultural Commentary

Mondrian memory protection (MMP) is a fine-grained protection scheme that allows multiple protection domains to flexibly share memory and export protected services. In contrast to earlier page-based systems, MMP allows arbitrary permissions control at the granularity of individual words. We use a compressed permissions table to reduce space overheads and employ two levels of permissions caching to reduce run-time overheads. The protection tables in our implementation add less than 9% overhead to the memory space used by the application. Accessing the protection tables adds than 8% additional memory references to the accesses made by the application. Although it can be layered on top of demand-paged virtual memory, MMP is also well-suited to embedded systems with a single physical address space. We extend MMP to support segment translation which allows a memory segment to appear at another location in the address space. We use this translation to implement zero-copy networking underneath the standard read system call interface, where packet payload fragments are connected together by the translation system to avoid data copying. This saves 52% of the memory references used by a traditional copying network stack.

/pdf/mondrian-memory-protection-1qwqsk88mi.pdf

Mondrian memory protection

Virtual machines face significant performance challenges beyond those confronted by traditional static optimizers. First, portable program representations and dynamic language features, such as dynamic class loading, force the deferral of most optimizations until runtime, inducing runtime optimization overhead. Second, modular program representations preclude many forms of whole-program interprocedural optimization. Third, virtual machines incur additional costs for runtime services such as security guarantees and automatic memory management. To address these challenges, vendors have invested considerable resources into adaptive optimization systems in production virtual machines. Today, mainstream virtual machine implementations include substantial infrastructure for online monitoring and profiling, runtime compilation, and feedback-directed optimization. As a result, adaptive optimization has begun to mature as a widespread production-level technology. This paper surveys the evolution and current state of adaptive optimization technology in virtual machines.

/pdf/a-survey-of-adaptive-optimization-in-virtual-machines-1fc19wywx7.pdf

A Survey of Adaptive Optimization in Virtual Machines

Existing research understates the benefits that can be obtained from inlining and cloning, especially when guided by profile information. Our implementation of inlining and cloning yields excellent results on average and very rarely lowers performance. We believe our good results can be explained by a number of factors: inlining at the intermediate-code level removes most technical restrictions on what can be inlined; the ability to inline across files and incorporate profile information enables us to choose better inline candidates; a high-quality back end can exploit the scheduling and register allocation opportunities presented by larger subroutines; an aggressive processor architecture benefits from more predictable branch behavior; and a large instruction cache mitigates the impact of code expansion. We describe the often dramatic impact of our inlining and cloning on performance: for example, the implementations of our inlining and cloning algorithms in the HP-UX 10.20 compilers boost SPECint95 performance on a PA8000-based workstation by a factor of 1.32.

Aggressive inlining

A compile method employs loop fusion to improve execution of a first loop and a second loop in a code sequence. A compile method initially peels one or more loop iterations from one of the loops to cause each of the loops to exhibit an equal number of loop iterations. Thereafter, an attempt is made to fuse the first and second loops, upon a condition that the resulting fused loop produces a same computational result as would be produced if the first loop and second loop were not fused. If the condition is not met, a loop reversal is performed on one of the loops and a fusing action is again attempted; if the attempted fusing action of the loops does not fulfill the condition, a loop reversal is performed on the other loop and a fusing action is again attempted. The combined loop peeling/loop reversal actions provide a higher probability of an ability to fuse the loops than otherwise.

Compiler for performing a loop fusion, dependent upon loop peeling and/or loop reversal

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Aggressive inlining

Compiler for performing a loop fusion, dependent upon loop peeling and/or loop reversal