R. Desineni

TL;DR: Fault tuples can accurately mimic the complex misbehavior of DSM ICs at the logic level, enabling practical diagnosis of large circuits, and indicate that fault tuples may enhance diagnosis significantly.

TL;DR: A new ATPG strategy is presented that uses a new metric to capture quality of a multiple-detect test set based on the number of unique states on lines in the physical neighborhood of a targeted line to generate higher quality test sets.

TL;DR: How fault tuples can and have been used to enhance testing tasks such as fault simulation, test generation, and diagnosis, and enable new capabilities such as interfault collapsing and application-based quality metrics is described.

TL;DR: A simulation-based benchmarking strategy is developed that uses circuit-level models to describe the complex nature of real defects and a simple yet powerful strategy using a small circuit and a set of bounded deformations for measuring the effectiveness of diagnosis techniques.