As an increasing attention towards sustainable development of energy and environment, the power electronics (PEs) are gaining more and more attraction on various energy systems. The insulated gate bipolar transistor (IGBT), as one of the PEs with numerous advantages and potentials for development of higher voltage and current ratings, has been used in a board range of applications. However, the continuing miniaturization and rapid increasing power ratings of IGBTs have remarkable high heat flux, which requires complex thermal management. In this paper, studies of the thermal management on IGBTs are generally reviewed including analyzing, comparing, and classifying the results originating from these researches. The thermal models to accurately calculate the dynamic heat dissipation are divided into analytical models, numerical models, and thermal network models, respectively. The thermal resistances of current IGBT modules are also studied. According to the current products on a number of IGBTs, we observe that the junction-to-case thermal resistance generally decreases inversely in terms of the total thermal power. In addition, the cooling solutions of IGBTs are reviewed and the performance of the various solutions are studied and compared. At last, we have proposed a quick and efficient evaluation judgment for the thermal management of the IGBTs depended on the requirements on the junction-to-case thermal resistance and equivalent heat transfer coefficient of the test samples.

Thermal Management on IGBT Power Electronic Devices and Modules

In this paper, the problem of how to describe the thermal properties of the insulated-gate bipolar transistor (IGBT) module with the use of the compact thermal model is considered. This model makes it possible to calculate internal temperature of every semiconductor device included in this module with self-heating phenomena and mutual thermal couplings between these devices taken into account. A new method of measuring parameters of the thermal model of devices contained in the considered module is proposed, and the accuracy of this method is discussed. Some results of measurements of the considered parameters are presented, and uneven distribution of temperature in the investigated module in selected conditions of its power supply is evaluated. Differences between the measured waveforms of the internal temperature of components of the IGBT module and its casings are discussed.

Measurements of Parameters of the Thermal Model of the IGBT Module

Silicon Carbide (SiC) devices are becoming increasingly available in the market due to the mature stage of development fact of their manufacturing process. Their numerous advantages compared to silicon (Si) devices, such as, for example, higher blocking capability, lower conduction voltage drop, and faster transitions make them more suitable for high-power and high-frequency converters. The aim of this paper is to study the switching behavior of the two most-widely studied configurations of SiC devices in the literature: the normally-on SiC JFET and the cascode using a normally-on SiC JFET and a low-voltage Si MOSFET. A detailed comparison of the turn-on and turn-off losses of both configurations is provided and the results are verified against the experimental efficiency results obtained in a boost converter operating in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM). Furthermore, special attention will be paid to the switching behavior of the cascode configuration, analyzing the effect of its low-voltage Si MOSFET and comparing different devices. The study carried out will confirm that the overall switching losses of the JFET are lower, making it more suitable for operating in the CCM in terms of the overall converter efficiency. However, the lower turn-off losses of the cascode show this device to be more suitable for the DCM when ZVS is achieved at the turn-on of the main switch. Finally, all the theoretical results have been verified in an experimental 600-W boost converter.

/pdf/switching-performance-comparison-of-the-sic-jfet-and-sic-2d604738it.pdf

Switching Performance Comparison of the SiC JFET and SiC JFET/Si MOSFET Cascode Configuration

The paper concerns modeling the nonisothermal characteristics of switch-mode voltage regulators (VRs) consisting of the boost converter with discrete semiconductor devices and a monolithic current-mode pulsewidth modulation controller. New electrothermal hybrid models of a p-n diode and a power metal oxide semiconductor transistor, as well as the electrothermal model of the monolithic UC3842 controller dedicated for SPICE analysis of switch-mode VRs are presented and described in detail. The results of simulations verified experimentally are given as well.

Modeling Nonisothermal Characteristics of Switch-Mode Voltage Regulators

An existing physics-based insulated gate bipolar transistor (IGBT) model, which has been proven accurate for both inductive turn-off and inductive turn-on simulations, is modified to account for planar-gate IGBT 2-D effects at the MOS end of the drift region. The modification is based on a steady-state solution of carrier distribution in the JFET region of the IGBT. The accuracy of this solution is verified through a set of finite element simulations. The improved accuracy of the modified model in terms of on-state forward drop and voltage tail at turn-on is verified through comparison with experimental results.

Physics-Based Model of Planar-Gate IGBT Including MOS Side Two-Dimensional Effects

An enhanced insulated gate bipolar transistor (IGBT) model based on the Kraus model with new derivations based on an extra parameter accounting for p-i-n injection was developed to allow simulation of both trench and DMOS IGBT structures. Temperature dependence was also implemented in the model. The model was validated against steady-state and transient measurements done on an 800-A 1.7-kV Dynex IGBT module at 25/spl deg/C and 125/spl deg/C. The Spice model has also shown excellent agreement with mixed mode MEDICI simulations. The Spice model also takes into account for the first time the parasitic thyristor effect allowing the dc and dynamic temperature-dependent latchup modeling of power modules as well as their temperature-dependent safe operating area.

Advanced SPICE modeling of large power IGBT modules

A novel IGBT electro-thermal model is implemented for the first time in PSpice for the simulation of steady state and transient temperature dependent IGBT operation including self-heating and latchup. A thermal circuit representing the characteristics of the IGBT package is developed and validated against a finite element model and experimental results. A novel electrical IGBT model based on the Kraus model is developed to account for the electrical impact of instantaneous junction temperature variations due to self-heating. The resulting electro-thermal model is validated against experimental dc and transient FBSOA measurements.

Advanced electro-thermal SPICE modeling of large power IGBTs

This paper presents an analysis of the static and dynamic behaviour of a 1.2 kV SiC vertical JFET. The JFET can block voltages up to 1450 V (for V/sub GS/=80 V), with a specific on-resistance as low as 2.3 m/spl Omega/cm/sup 2/. The mixed-mode performance is investigated by coupling the SiC JFET in a cascode circuit with a low power Si MOSFET. Comparing the circuit performance to that of a SiC trench MOSFET, it turns out that the SiC/Si cascode is almost twice faster than the MOSFET. Coupling this with the fact that the SiC/Si cascode pair has better on-state performance, it is concluded that the cascode is a superior alternative to the classical SiC trench MOSFET.

Analysis of static and dynamic behaviour of SiC and Si devices connected in cascode configuration

Silicon/Oxide/Silicon Carbide (SiOSiC) - A New Approach to High-Voltage, High-Frequency Integrated Circuits

This paper presents a preliminary theoretical and numerical investigation of 4H-SiC JFET and MOSFET at 6.5 kV. To improve the on-state/breakdown performance of the JFET, buried layers in conjunction with a highly doped buffer layer have been used. Trench technology has been employed for the MOSFET. The devices were simulated and optimized using the MEDICI simulator. From a comparison between the two devices, it turns out that the JFET offers a better on-state/breakdown trade-off, while the trench MOSFET has the advantage of MOS-control.

Theoretical and numerical investigation of SiC JFET and MOSFET at 6.5 kV

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