Qiang Huo
Chinese Academy of Sciences
19 Papers
22 Citations
Qiang Huo is an academic researcher from Chinese Academy of Sciences. The author has contributed to research in topics: Computer science & Negative impedance converter. The author has an hindex of 5, co-authored 16 publications.
Chat about Author
Papers
A computing-in-memory macro based on three-dimensional resistive random-access memory
Qiang Huo,Yiming Yang,Yiming Wang,Dengyun Lei,Xiangqu Fu,Qirui Ren,Xiaoxin Xu,Qing Luo,Guozhong Xing,Chengying Chen,Xin Si,Hao Wu,Yiyang Yuan,Qiang Li,Xiaoran Li,Xinhua Wang,Meng-Fan Chang,Peng Zhang,Ming Li +18 more
TL;DR: In this paper , a two-kilobit non-volatile computing-in-memory macro was proposed to perform 3D vector-matrix multiplication operations with an energy efficiency of 8.32 tera-operations per second per watt when the input, weight and output data are 8, 9 and 22 bits, respectively, and the bit density is 58.2 bit µm −2 .
A computing-in-memory macro based on three-dimensional resistive random-access memory
Qiang Huo,Yiming Yang,Yiming Wang,Dengyun Lei,Xiangqu Fu,Qirui Ren,Xiaoxin Xu,Qing Luo,Guozhong Xing,Chengying Chen,Xin Si,Hao Wu,Yiyang Yuan,Qiang Li,Xiaoran Li,Xinhua Wang,Meng-Fan Chang,Peng Zhang,Ming Li +18 more
TL;DR: In this article , a two-kilobit non-volatile computing-in-memory macro was proposed to perform 3D vector-matrix multiplication operations with an energy efficiency of 8.32 tera-operations per second per watt when the input, weight and output data are 8, 9 and 22 bits, respectively, and the bit density is 58.2 bit µm −2 .
Physics-Based Device-Circuit Cooptimization Scheme for 7-nm Technology Node SRAM Design and Beyond
Qiang Huo,Zhenhua Wu,Xingsheng Wang,Weixing Huang,Jiaxin Yao,Jianhui Bu,Feng Zhang,Ling Li,Ming Liu +8 more
TL;DR: This article presents a comprehensive assessment on the 6T static random access memory (SRAM) cell with 7-nm FinFET technology by implementing quantum physics-based device-circuit cooptimization, which has the advantages of easy implementation, technology-friendly, and high accuracy, but also suitable for path-finding researches on 5-nm node and beyond.
34
Demonstration of 3D Convolution Kernel Function Based on 8-Layer 3D Vertical Resistive Random Access Memory
Qiang Huo,Ming Liu,Renjun Song,Lei Dengyun,Qing Luo,Zhenhua Wu,Zuheng Wu,Xiaojin Zhao,Feng Zhang,Ling Li +9 more
TL;DR: The experimental results show that 3D convolution kernels can be correctly implemented on the in-house 3D VRRAM with higher parallelism than the conventional architecture, paving the way of 3DVRRAM-based processing-in-memory (PIM) architecture for 3D CNNs.
23
Ternary Logic Circuit Based on Negative Capacitance Field-Effect Transistors and Its Variation Immunity
TL;DR: In this article, a ternary logic inverter based on negative capacitance FETs without additional footprints has been realized, and the third intermediate state can be successfully obtained at ${V}_{\text {DD}}$ /2 in the conventional binary CMOS inverter.
19