Multiple-valued logic, in which the number of discrete logic levels is not confined to two, has been the subject of much research over many years. The practical objective of this work has been to increase the information content of the digital signals in a system to a higher value than that provided by binary operation. In this tutorial/survey paper we will review the historical developments in this field, both in circuit realizations and in methods of handling multiple-valued design data, and consider the present state-of-the-art and future expectations.

Multiple-Valued Logic&#8212;its Status and its Future

In this paper, a novel algorithm called bi-objective elite differential evolution (BOEDE) is proposed to optimize multivalued logic (MVL) networks. It is a multiobjective algorithm completely different from all previous single-objective optimization ones. The two objective functions, error and optimality, are put into evaluating the fitness of individuals in evolution simultaneously. BOEDE innovatively uses an archive population with different ranks to store elite individuals and offsprings. Moreover, a characteristic updating method based on this archive structure is designed to produce the parent population. Because of the particularity of MVL network problems, the performance of BOEDE to solve them is further improved by strictly distinguishing elite solutions and Pareto optimal solutions, and by modifying the method of dealing with illegal variables. The simulations show that BOEDE can collect a great number of solutions to provide decision support for a variety of applications. The comparison results also indicate that BOEDE is significantly better than the existing algorithms.

Bi-objective Elite Differential Evolution Algorithm for Multivalued Logic Networks

A brief overview of past progress in multiple-valued logic design is presented. The methods are considered with respect to the likely development of multiple-valued field programmable gate arrays. Look-up table based arrays are considered in some detail and an algorithm for mapping multiple-valued functions to such an array is presented. This algorithm uses reduced order multiple-valued decision diagrams, an extension of R.E. Bryant's (1986) well-studied structure for binary functions. The algorithm works in the functional domain and does not require the synthesis and optimization of a conventional network prior to technology mapping. >

Multiple-valued logic design tools

A heuristic method to obtain near-minimal covers of p-valued switching functions is introduced. First, we describe transform tools useful in the processing of MVL functions. They are: p-adic shifting, weighting, and implicant detecting transformations. Based on these tools, a direct cover algorithm is presented that uses local information for heuristic decision making. The heuristics are taken from weight coefficients calculated for canonical terms and implicants. The method allows to assign cost factors to implicants. Further, the algorithms can be modified easily, so as to correspond to various connectives (e.g., MAX, PLUS).

Heuristic Minimization of MVL Functions: A Direct Cover Approach

The performance of various heuristic algorithms for minimizing realizations of multiple-valued functions by the charge-coupled device (CCD) and CMOS programmable logic arrays (PLAs) of H.G. Kerkhoff and J.T. Butler (1986) and J.G. Samson (1988), respectively, is analyzed. The functions realized by the PLAs are in sum-of products form, where the sum is ordinary addition truncated to the highest logic value and the product represents the MIN operation of functions of the input variables that are the interval literal operations. Three heuristics, proposed by G. Pomper and J.A. Armstrong (1981), P.W. Besslich (1986), and G.W. Dueck and D.M. Miller (1987), are compared over sets of random and random-symmetric functions. An exact minimization method that is a tree search using backtracking is described. A reduction in the search space is achieved by considering constrained implicant sets and by eliminating some implicants altogether. Even with this improvement, the time required for exact minimization is extremely high when compared to all three heuristics. The case involving only prime implicants is considered, and it is shown that such implicants have marginal value compared to constrained implicant sets. The basis of comparison is the average number of product terms. >

Minimization algorithms for multiple-valued programmable logic arrays

An efficient method for representing multivalued functions is described. The method employs an algorithm which generates an efficient cover for a given function "directly," i.e., without resorting to the intermediate step of creating a table of prime implicants. Data are presented to show that the covers generated are as efficient in terms of cover size as prime implicant based methods. More importantly, however, the direct cover method is shown to require much less computation time than prime implicant based methods, thus making it practical for functions with a large number of input variables and/or as the radix of implementation increases. The algorithm is introduced by applying it to functional representations employing the traditional max and min operation. Next, a modified form of the algorithm is presented for use with the sum and product operators more appropriate to I2L and other current summation technologies.

Representation of Multivalued Functions Using the Direct Cover Method

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Representation of Multivalued Functions Using the Direct Cover Method