Damascene copper electroplating for on-chip interconnections, a process that we conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition. We discuss here the relationship of additives in the plating bath to superfilling, the phenomenon that results in superconformal coverage, and we present a numerical model which accounts for the experimentally observed profile evolution of the plated metal.

Damascene copper electroplating for chip interconnections

Role of local chemical fluctuations in the shock dynamics of medium entropy alloy CoCrNi

For the common Cu-Sn interconnection system in microelectronics packaging, a significant concern is the sporadic interfacial void formation within the Cu–Sn interface and intermetallic compound (IMC) layer during the service. The existence of these voids affects the electrical and mechanical properties of the joint and thus deteriorates reliability. Most scholars simply attribute the Kirkendall voids problem to the Kirkendall effect caused by the difference in Cu/Sn inter-diffusion coefficients. However, Kirkendall voids are formed for a combination of many reasons. The plating additives, current density, surface roughness, coating thickness, and substrate types affect the formation of Kirkendall voids. We believe that among the many factors affecting the formation of voids, the unbalanced diffusion of elements (Kirkendall effect) is the root cause, and impurities and Cu microstructure are the dominant factors. The addition of alloying elements to the solder affects the formation of voids by changing the unbalanced diffusion of elements. This paper releases the possible mechanism of Kirkendall voids and gives the perspective summary from three steps of void formation, and the available suppression method is given based on the final solution. 

Forming mechanism and growth of Kirkendall voids of Sn/Cu joints for electronic packaging: A recent review

Intermetallic compound(s) (IMC) that nucleates at the interface between solder and Cu trace during a soldering reaction, is one of the most crucial factors for microelectronic packaging reliability. This study was conducted to modify the IMC microstructure and to reinforce the mechanical strength of Sn–Ag–Cu/Cu microelectronic joints through various surface finish coatings, including organic solderability preservative (OSP), immersion Ag (ImAg), immersion Sn (ImSn), Au/Pd (electroless palladium/immersion gold, EPIG), and Au/Pd/Au (IGEPIG) layer(s). We confirmed that the type of surface finish dominated the IMC growth morphology and mechanical characteristics of the Sn–Ag–Cu/Cu solder joints, even though these surface finishes were eliminated in a few seconds of the soldering process. A dense Cu6Sn5 layer with a scallop-like appearance was obtained for the traditional OSP case, while a prismatic, loose Cu6Sn5 microstructure was produced for the alternative cases (metal films). This loose Cu6Sn5 microstructure offered numerous molten solder channels for the in-diffusion of Sn to Cu, retarding undesired Cu3Sn growth at the Cu6Sn5/Cu interface; consequently, a brittle-to-ductile transition in the joint fracture mode with a high shear strength and fracture energy was obtained in the high-speed ball shear (HSBS) test. A significant mechanical reinforcement of the Sn–Ag–Cu/Cu microelectronic joints can be achieved with the replacement of the traditional OSP coating by the newly developed IGEPIG trilayer surface finish.

IMC microstructure modification and mechanical reinforcement of Sn–Ag–Cu/Cu microelectronic joints through an advanced surface finish technique

Electrodeposition of Twinned Cu with Strong Texture Effect on Voiding Propensity in Electroplated Cu Solder Joints

Study of grain size effect of Cu metallization on interfacial microstructures of solder joints

The use of organic additives is crucial for Cu electrodeposition. However, specific impure species originating from the additives are incorporated in the Cu electroplated layer, causing serious reliability problems such as void formation at the solder/Cu joints. In this study, three Cu substrates were electroplated using various additive formulas. The use of organic additives results in an incorporation of a higher level of impurity in the Cu-electroplated layers and also affects the atomic deposition behavior of Cu which alters the grain microstructures. By using a specific additive formula, the grain growth of Cu evolves into a slender structure with a high density of twins. Thermal aging experiments of the Sn/Cu joints show that the void formation is successfully suppressed at the joint using a slender-grained Cu substrate, and that the suppression effect is attributed to the high microstructural stability of the twinning structure.

Suppression of Void Formation at Sn/Cu Joint Due to Twin Formation in Cu Electrodeposit

Void formation is a critical reliability concern for solder joints in electronic packaging. The control of microstructures and the quantity of impurities in Cu electroplated films significantly affect void formation at the joint interface, but studies investigating these factors are rare. In this study, three Cu films (denoted as A, B, and C) are fabricated using an electroplating process. The Cu A film has a faceted grain texture embedded with twin boundaries, while Cu B and C films have similar columnar textures. After thermal aging at 200 °C for 1000 h, the SAC 305 (Sn-3.0Ag-0.5Cu) solder joints with Cu A and B films exhibit robust interfacial structures without voids. However, microstructural collapse is observed in the solder joint of SAC 305/Cu C, where many crevices are formed parallel to the interface. Based on the microanalysis, the concentration of impurities is higher in Cu C than in Cu A and B. Moreover, discrete voids rather than continuous crevices are present in the SAC305/Cu C system when the impurity concentration in Cu C is reduced. The findings demonstrate that impurity control in Cu electroplated film is critical for the control of void/crevice formation in electronic solder joints.

/pdf/effects-of-impurities-on-void-formation-at-the-interface-11q3g9iaks.pdf

Effects of impurities on void formation at the interface between Sn-3.0Ag-0.5Cu and Cu electroplated films

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Study of grain size effect of Cu metallization on interfacial microstructures of solder joints

Electrodeposition of Twinned Cu with Strong Texture Effect on Voiding Propensity in Electroplated Cu Solder Joints

Suppression of Void Formation at Sn/Cu Joint Due to Twin Formation in Cu Electrodeposit

Effects of impurities on void formation at the interface between Sn-3.0Ag-0.5Cu and Cu electroplated films