Philippe Garnier
STMicroelectronics
42 Papers
104 Citations
Philippe Garnier is an academic researcher from STMicroelectronics. The author has contributed to research in topics: Photoresist & Silicon. The author has an hindex of 5, co-authored 40 publications.
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Papers
Mechanical and Electrical Analysis of Strained Liner Effect in 35 nm Fully Depleted Silicon-on-Insulator Devices with Ultra Thin Silicon Channels
C. Gallon,Claire Fenouillet-Beranger,Stephane Denorme,Frederic Boeuf,Vincent Fiori,Nicolas Loubet,A. Vandooren,T. Kormann,M. Broekaart,Pascal Gouraud,Francois Leverd,G. Imbert,C. Chaton,C. Laviron,L. Gabette,F. Vigilant,Philippe Garnier,H. Bernard,A. Tarnowka,Roland Pantel,F. Pionnier,S. Jullian,Sorin Cristoloveanu,Thomas Skotnicki +23 more
TL;DR: In this article, the effects of a strained contact etch stop layer (CESL) on fully depleted (FD) silicon-on-insulator (SOI) devices with ultra thin silicon channels were investigated.
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Cleaning surfaces from nanoparticles with polymer film: impact of the polymer stripping
Adeline Lallart,Philippe Garnier,Elise Lorenceau,Alain H. Cartellier,Elisabeth Charlaix +4 more
- 01 Nov 2018
TL;DR: In this article, a solution based on the polymer coating and removal without substrate consumption is described and its performances are evaluated, and the authors demonstrate that a physical action is required to remove particles.
9
Investigation of the TiN/photoresist interface degradation during a wet etch
TL;DR: In this article, the surface modifications of the TiN layer below the photoresist were investigated and the appearance of large bumps at its surface was found to be caused by surface modifications, with chemical modifications inside the bump area.
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High sensitivity pH sensing on the BEOL of industrial FDSOI transistors
Lama Rahhal,Getenet Tesega Ayele,Stephane Monfray,Jean-Pierre Cloarec,Benjamin Fornacciari,Eric Pardoux,Céline Chevalier,Serge Ecoffey,Dominique Drouin,Pierre Morin,Philippe Garnier,Frederic Boeuf,Abdelkader Souifi +12 more
TL;DR: In this paper, the authors demonstrate the use of Fully Depleted Silicon On Insulator (FDSOI) transistors as pH sensors with a 23nm silicon nitride sensing layer built in the Back-End-Of-Line (BEOL) process.
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