Peter Coppens
ON Semiconductor
15 Papers
41 Citations
Peter Coppens is an academic researcher from ON Semiconductor. The author has contributed to research in topics: Leakage (electronics) & Power semiconductor device. The author has an hindex of 6, co-authored 15 publications.
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Papers
An industrial process for 650V rated GaN-on-Si power devices using in-situ SiN as a gate dielectric
Peter Moens,Charlie Liu,Abhishek Banerjee,Piet Vanmeerbeek,Peter Coppens,H. Ziad,A. Constant,Z. Li,H. De Vleeschouwer,Jaume Roig-Guitart,P. Gassot,Filip Bauwens,E. De Backer,Balaji Padmanabhan,Ali Salih,J. Parsey,Marnix Tack +16 more
- 15 Jun 2014
TL;DR: In this paper, an industrial DHEMT process for 650V rated GaN-on-Si power devices is described, which uses an in-situ MOCVD grown SiN as surface passivation and gate dielectric.
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(Invited) intrinsic reliability assessment of 650V rated AlGaN/GaN based power devices: an industry perspective
Peter Moens,Abhishek Banerjee,A. Constant,Peter Coppens,Markus Caesar,Zilan Li,Steven Vandeweghe,Frederick Declercq,Balaji Padmanabhan,Woochul Jeon,Jia Guo,Ali Salih,Marnix Tack,Matteo Meneghini,Stefano Dalcanale,A Tajilli,Gaudenzio Meneghesso,Enrico Zanoni,Michael J. Uren,Indranil Chatterjee,Serge Karboyan,Martin Kuball +21 more
- 19 May 2016
TL;DR: In this article, the most important intrinsic reliability mechanisms for GaN power devices are discussed, including gate dielectric reliability, Ohmic contact reliability, accelerated drain stress testing (high temperature reverse bias--HTRB) and high voltage device wear-out testing (High voltage off-state stress--HVOS).
AlGaN/GaN power device technology for high current (100+ A) and high voltage (1.2 kV)
Peter Moens,A. Banerjee,Peter Coppens,F. Declercq,Marnix Tack +4 more
- 12 Jun 2016
TL;DR: In this article, a GaN/GaN power device with single digit Ron values of 6mΩ and leakage current of ∼100nA is presented, which is a first step to allow AlGaN/GAN power devices to compete with Si IGBTs and SiC MOSFETs.
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Technology and design of GaN power devices
Peter Moens,A. Banerjee,Peter Coppens,A. Constant,Piet Vanmeerbeek,Z. Li,F. Declercq,L. De Schepper,H. De Vleeschouwer,Charlie Liu,Balaji Padmanabhan,Woochul Jeon,J. Guo,Ali Salih,Marnix Tack +14 more
- 12 Nov 2015
TL;DR: This paper reports on the technology and design aspects of an industrial DHEMT process for 650V rated GaN-on-Si power devices, using an in-situ MOCVD grown SiN as surface passivation and gate dielectric, with low interface state density and excellent TDDB.
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Wafer Bevel Protection During Deep Reactive Ion Etching
Rémy Charavel,Jaume Roig,Efrain Altamirano-Sanchez,Joke Van Aelst,Katia Devriendt,Koen Van Wichelen,Pierre Gassot,Peter Coppens,Eddy De Backer +8 more
TL;DR: In this article, two methods are proposed to prevent the bevel degradation during deep reactive ion etching using an oxide hard mask, in one case this oxide mask is deposited and in the second case the oxide hard masks is grown.
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