Payman Behnam
University of Utah
33 Papers
121 Citations
Payman Behnam is an academic researcher from University of Utah. The author has contributed to research in topics: Computer science & Debugging. The author has an hindex of 8, co-authored 27 publications. Previous affiliations of Payman Behnam include Georgia Institute of Technology & University of Tehran.
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Papers
FORMS: fine-grained polarized ReRAM-based in-situ computation for mixed-signal DNN accelerator
Geng Yuan,Payman Behnam,Zhengang Li,Ali Shafiee,Sheng Lin,Xiaolong Ma,Hang Liu,Xuehai Qian,Mahdi Nazm Bojnordi,Yanzhi Wang,Caiwen Ding +10 more
- 14 Jun 2021
TL;DR: For instance, the fine-grained ReRAM-based DNN accelerator with algorithm/hardware co-design as mentioned in this paper achieves 1.12× and 2.4 × speed up in terms of frame per second over optimized ISAAC with almost the same power/area cost.
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TinyADC: Peripheral Circuit-aware Weight Pruning Framework for Mixed-signal DNN Accelerators
Geng Yuan,Payman Behnam,Yuxuan Cai,Ali Shafiee,Jingyan Fu,Zhiheng Liao,Zhengang Li,Xiaolong Ma,Jieren Deng,Jinhui Wang,Mahdi Nazm Bojnordi,Yanzhi Wang,Caiwen Ding +12 more
- 01 Feb 2021
TL;DR: In this article, the authors proposed a weight pruning framework for ReRAM-based mixed-signal DNN accelerators, which effectively reduces the required bits for ADC resolution and hence the overall area and power consumption of the accelerator without introducing any computational inaccuracy.
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High-Speed Hardware Implementation of Fixed and Runtime Variable Window Length 1-D Median Filters
TL;DR: A novel architecture is proposed for the hardware implementation of fixed and runtime variable window length one-dimensional median filters where the maximum working clock frequency is almost independent of the median filter window length, whereas the hardware complexity is proportional to the number of samples in the window.
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A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs
TL;DR: A formal debugging approach based on static slicing and dynamic ranking methods to derive a reduced ordered set of potential error locations and a mutation-based technique is employed to automatically correct bugs even in the case of multiple bugs.
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R-Cache: A Highly Set-Associative In-Package Cache Using Memristive Arrays
Payman Behnam,Arjun Pal Chowdhury,Mahdi Nazm Bojnordi +2 more
- 01 Oct 2018
TL;DR: This paper proposes R-Cache, an in-package cache made by 3D die stacking of memristive memory arrays to alleviate the above mentioned challenges and results in averages of 40% and 27% energy reductions as compared to the direct mapped and set associative cache systems.
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