P. Kumbhare
Indian Institute of Technology Bombay
32 Papers
58 Citations
P. Kumbhare is an academic researcher from Indian Institute of Technology Bombay. The author has contributed to research in topics: Resistive random-access memory & Spiking neural network. The author has an hindex of 10, co-authored 31 publications. Previous affiliations of P. Kumbhare include Katholieke Universiteit Leuven & Indian Institutes of Technology.
Chat about Author
Papers
PCMO RRAM for Integrate-and-Fire Neuron in Spiking Neural Networks
TL;DR: PCMO-based neuron in spiking neural network yields software-equivalent classification accuracy as demonstrated on standard Fischer’s Iris flower data set and the availability of a non-volatile PC MO-based synapse makes PCMO for IF neuron attractive.
141
Punchthrough-Diode-Based Bipolar RRAM Selector by Si Epitaxy
V. S. S. Srinivasan,Saurabh Chopra,P. Karkare,P. Bafna,Sandip Lashkare,P. Kumbhare,Y. Kim,S. Srinivasan,S. Kuppurao,Saurabh Lodha,Udayan Ganguly +10 more
TL;DR: In this paper, an epitaxial punchthrough diode for bipolar resistance RAM (RRAM) selector application is proposed, which is used to deposit n+/p/n+ layers which are fabricated into 300-nm-diameter vertical punchthrough diodes.
91
Memory Performance of a Simple Pr 0.7 Ca 0.3 MnO 3 -Based Selectorless RRAM
TL;DR: In this article, a single oxide layer device (W/PCMO/Pt) was proposed to enhance nonlinearity in low-resistance state (LRS) currents of resistance random access memory (RRAM) devices.
39
Self-Heating During submicrosecond Current Transients in Pr 0.7 Ca 0.3 MnO 3 -Based RRAM
TL;DR: In this paper, self-heating was used to explain nonlinearity in dc IV characteristics in non-filamentary Pr0.7Ca0.3MnO3 (PCMO) RRAM.
35
A Highly Reliable and Unbiased PUF Based on Differential OTP Memory
TL;DR: In this article, a differential OTPM-based PUF with a parallel circuit of two OTPMs in series with a resistance was proposed, where a high voltage stochastically produces a breakdown in one of the two OTMs first, which then reduces the voltage drop across the parallel OTPM circuit to prevent further breakdown events.
18