Neural Control of Rhythmic Movements in Vertebrates

Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

The growing interest in pulse-mode processing by neural networks is encouraging the development of hardware implementations of massively parallel networks of integrate-and-fire neurons distributed over multiple chips. Address-event representation (AER) has long been considered a convenient transmission protocol for spike based neuromorphic devices. One missing, long-needed feature of AER-based systems is the ability to acquire data from complex neuromorphic systems and to stimulate them using suitable data. We have implemented a general-purpose solution in the form of a peripheral component interconnect (PCI) board (the PCI-AER board) supported by software. We describe the main characteristics of the PCI-AER board, and of the related supporting software. To show the functionality of the PCI-AER infrastructure we demonstrate a reconfigurable multichip neuromorphic system for feature selectivity which models orientation tuning properties of cortical neurons

/pdf/a-multichip-pulse-based-neuromorphic-infrastructure-and-its-2xsnngfc8x.pdf

A Multichip Pulse-Based Neuromorphic Infrastructure and Its Application to a Model of Orientation Selectivity

Compared with wheeled mobile robots, legged robots can easily step over obstacles and walk through rugged ground. They have more flexible bodies and therefore, can deal with complex environment. Nevertheless, some other issues make the locomotion control of legged robots a much complicated task, such as the redundant degree of freedoms and balance keeping. From literatures, locomotion control has been solved mainly based on programming mechanism. To use this method, walking trajectories for each leg and the gaits have to be designed, and the adaptability to an unknown environment cannot be guaranteed. From another aspect, studying and simulating animals’ walking mechanism for engineering application is an efficient way to break the bottleneck of locomotion control for legged robots. This has attracted more and more attentions. Inspired by central pattern generator (CPG), a control method has been proved to be a successful attempt within this scope. In this paper, we will review the biological mechanism, the existence evidences, and the network properties of CPG. From the engineering perspective, we will introduce the engineering simulation of CPG, the property analysis, and the research progress of CPG inspired control method in locomotion control of legged robots. Then, in our research, we will further discuss on existing problems, hot issues, and future research directions in this field.

/pdf/survey-of-locomotion-control-of-legged-robots-inspired-by-4tr0nm1zdn.pdf

Survey of locomotion control of legged robots inspired by biological concept

The artificial spiking neural network (SNN) is promising and has been brought to the notice of the theoretical neuroscience and neuromorphic engineering research communities. In this light, we propose a new type of artificial spiking neuron based on leaky integrate-and-fire (LIF) behavior. A distinctive feature of the proposed FG-LIF neuron is the use of a floating-gate (FG) integrator rather than a capacitor-based one. The relaxation time of the charge on the FG relies mainly on the tunnel barrier profile, e.g., barrier height and thickness (rather than the area). This opens up the possibility of large-scale integration of neurons. The circuit simulation results offered biologically plausible spiking activity (<100 Hz) with a capacitor of merely 6 fF, which is hosted in an FG metal-oxide-semiconductor field-effect transistor. The FG-LIF neuron also has the advantage of low operation power (<30 pW/spike). Finally, the proposed circuit was subject to possible types of noise, e.g., thermal noise and burst noise. The simulation results indicated remarkable distributional features of interspike intervals that are fitted to Gamma distribution functions, similar to biological neurons in the neocortex.

/pdf/leaky-integrate-and-fire-neuron-circuit-based-on-floating-3zddx08pw9.pdf

Leaky Integrate-and-Fire Neuron Circuit Based on Floating-Gate Integrator.

A new central pattern generator chip with 24 silicon neurons and reprogrammable connectivity is presented. The 3mm /spl times/ 3mm chip fabricated in a 3M2P 0.5/spl mu/m process contains 1032 synapses, each with multiple floating gates for storing parameters governing synaptic strength and polarity. Every neuron includes a dendritic compartment with 12 externally-addressable synaptic inputs and 24 recurrent synaptic inputs, enabling construction of a fully-interconnected network with sensory feedback from off-chip elements. In addition to describing the chip architecture and neuron circuits, preliminary results from single oscillating neurons and pairs of phase-locked neurons are shown. This work represents the realization of a design presented at ISCAS'05, and an improvement over our 2nd generation CPG chip presented at ISCAS'04.

/pdf/a-floating-gate-programmable-array-of-silicon-neurons-for-1or2zj86ax.pdf

A floating-gate programmable array of silicon neurons for central pattern generating networks

A programmable array of silicon neurons for the creation of central pattern generator (CPG) networks is described The design consists of 20 integrate-and-fire neurons, each with multiple synaptic inputs and tunable spike frequency adaptation circuitry The synapse area is reduced by 80% relative to our previously fabricated chip by using floating gate transconductance amplifiers in place of current DACs In addition to describing the design of the silicon neurons and synapses, we present results illustrating performance characteristics of the circuits and show how elaborate and biologically-plausible CPG networks can be implemented by controlling synaptic weights The patterns generated by these circuits are shown to be sufficient to control a biped robot with a variety of different locomotory gaits

/pdf/a-spiking-silicon-central-pattern-generator-with-floating-3syohc1pcr.pdf

A spiking silicon central pattern generator with floating gate synapses [robot control applications]

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A floating-gate programmable array of silicon neurons for central pattern generating networks

A spiking silicon central pattern generator with floating gate synapses [robot control applications]