This paper describes the latest and most advanced surface-potential-based model jointly developed by The Pennsylvania State University and Philips. Specific topics include model structure, mobility and velocity saturation description, further development and verification of symmetric linearization method, recent advances in the computational techniques for the surface potential, modeling of gate tunneling current, inclusion of the retrograde impurity profile, and noise sources. The emphasis of this paper is on incorporating the recent advances in MOS device physics and modeling within the compact modeling context

PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

The artificial neural network (ANN)-based compact modeling methodology is evaluated in the context of advanced field-effect transistor (FET) modeling for Design-Technology-Cooptimization (DTCO) and pathfinding activities. An ANN model architecture for FETs is introduced, and the results clearly show that by carefully choosing the conversion functions (i.e., from ANN outputs to device terminal currents or charges) and the loss functions for ANN training, ANN models can reproduce the current–voltage and charge–voltage characteristics of advanced FETs with excellent accuracy. A few key techniques are introduced in this work to enhance the capabilities of ANN models (e.g., model retargeting, variability modeling) and to improve ANN training efficiency and SPICE simulation turn-around-time (TAT). A systematical study on the impact of the ANN size on ANN model accuracy and SPICE simulation TAT is conducted, and an automated flow for generating optimum ANN models is proposed. The findings in this work suggest that the ANN-based methodology can be a promising compact modeling solution for advanced DTCO and pathfinding activities.

Artificial Neural Network-Based Compact Modeling Methodology for Advanced Transistors

This paper presents dc and ac tests that verify whether a MOSFET model is symmetric with respect to a source-drain reversal. The tests are valid in the presence of and also verify the symmetry of gate and bulk currents, and evaluate the symmetry of all components of MOSFET charge models

Validation of MOSFET model Source&#8211;Drain Symmetry

CMOS passive mixer linearity is analyzed using a Volterra-series analysis and closed-form expressions for IIP2, two-tone IIP3, and cross-modulation IIP3 are presented, exhibiting dependence upon the mixer source and load impedances. Design guidelines are suggested for improving the mixer linearity performance. Accurate expressions are presented for the input impedance of an ideal passive mixer with an arbitrary load impedance. The calculations are in close agreement with the measured results and the simulated response.

Distortion in Current Commutating Passive CMOS Downconversion Mixers

This paper examines the relation between the structure of a compact MOSFET model and its ability to model harmonic distortion. It is found that non-singular behavior at zero drain bias is essential for qualitatively correct simulations of the third harmonic power dependence. Specifically, nonlinear distortion analysis requires that the Gummel symmetry condition be satisfied by the compact model. A simple procedure to enforce the Gummel symmetry without increasing the complexity of the model is incorporated in an advanced surface-potential-based MOSFET model to enable correct harmonic distortion modeling.

RF distortion analysis with compact MOSFET models

Recent progress in MOS device physics, model development, and model implementation processes has qualitatively changed the capabilities of compact models precisely at a time when the rapid expansion of RF MOSFET applications is imposing the most stringent demands on the new generation of MOSFET models This work reviews the impact of the new modeling paradigm on MOSFET circuit simulation with particular attention to RF issues, non-quasi-static effects, and symmetric surface-potential-based models General principles are illustrated with the simulation results using the latest generation compact MOSFET model (SP)

Advanced compact models: gateway to modern CMOS design

Recent progress in MOS device physics, model development, and model implementation process has qualitatively changed the capabilities ofcompact models precisely at a time when the rapid expansion ofRF MOSFET applications is imposing the most stringent demands on the new generation ofMOSFET models. This work reviews the impact ofthe new modeling paradigm on MOSFET circuit simulation with particular attention to RF issues, non-quasi-static effects, and symmetric surface-potential-based models. General principles are illustrated with the simulation results using the latest generation compact MOSFET model (SP).

http://ieeexplore.ieee.org/iel5/9627/30421/01399761.pdf

Advanced Compact Models: Gateway to Modern CMOS Design (Invited)

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RF distortion analysis with compact MOSFET models

Advanced compact models: gateway to modern CMOS design

Advanced Compact Models: Gateway to Modern CMOS Design (Invited)