A test analysis apparatus for OBIC analysis and luminous analysis from a rear surface of a semiconductor wafer. According to the present invention, a semiconductor wafer is mounted on a wafer chuck and a probe card which has metallic needles and which is movable along the X, Y, and Z axes supplies a test pulse signal to respective electrode pads on the front surface of the semiconductor wafer. Then, current generated in the semiconductor wafer is detected at the electrode pads. Optical analysis, such as irradiation with a light beam, detection of reflected light, detection of light generated in the semiconductor wafer and the like, is performed from the rear side of the semiconductor wafer, thereby enabling analysis of a failure or a defect of a defective portion while the semiconductor wafer is in actual operating conditions.

Test analysis apparatus and analysis method for semiconductor wafer using OBIC analysis

https://core.ac.uk/download/pdf/11453612.pdf

Dielectric breakdown I: A review of oxide breakdown

A review of hot-carrier degradation mechanisms in MOSFETs

Optical emission consisting of pulses with temporal widths of less than 270 ps has been detected from fully functional silicon integrated circuits fabricated using submicron complementary metal– oxide–semiconductor (CMOS) logic gates. Emission is observed under normal bias conditions and occurs when the gates are switching. The emission arises from the hot electron populations created by the transient current pulses present in the transistors during switching. The speed and spectral characteristics of the emission suggest future applications in the measurement of timing in high speed CMOS circuits.

Picosecond hot electron light emission from submicron complementary metal–oxide–semiconductor circuits

Subnanosecond pulses of hot electron luminescence are shown to be generated coincident with logic state switching of individual devices in CMOS circuits. These pulses are used to directly observe 90 ps gate delays in a ring oscillator as well as the logic switching and gate delays of a counter. By use of a detector with both space- and time-resolution, the dynamics of all the gates of the circuit are simultaneously measured. This noninvasive technique can be extended to smaller device size, as well as probing from the backside of the wafer. The optical emission may provide an alternative to electron beam testing for measuring the dynamics of high-speed CMOS circuits.

/pdf/dynamic-internal-testing-of-cmos-circuits-using-hot-3qq1np9z5m.pdf

Dynamic internal testing of CMOS circuits using hot luminescence

An evaluation technology for VLSI reliability using hot carrier luminescence has been developed. Problems with conventional electrical methods have been solved by the analysis of weak luminescence emitted from operating devices. Two applications are described. First, for the gate oxide evaluation, it is found that the best stress condition is determined by monitoring uniform photon count distribution emitted from the gate capacitors. Second, a method is proposed to find the weakest transistor in an LSI circuit against hot-carrier-induced degradation by counting photon emissions. This method is applied to the analysis of SRAMs (static RAMs) when the transistors to be improved have been detected. >

Evaluation technology of VLSI reliability using hot carrier luminescence

A method developed to find the weakest transistor against hot-carrier-induced degradation by counting photon emission of various wavelengths in an operating VLSI circuit is presented. The method's underlying principle is that high-energy photons emitted from the transistors are caused by hot-carrier effects. The spectral distribution of photon energy emitted from n-channel MOSFETs is studied, and is found to follow the Maxwell-Boltzmann distribution. Photon emission with about 200 nm wavelength strongly correlates with hot-carrier-induced degradation. This method was applied to the static random access memory in a microprocessor. Transistors which are estimated to be seriously degraded by hot-carrier effect were detected. This method improves the reliability of VLSI circuits without long-term testing. >

New detection method of hot-carrier degradation using photon spectrum analysis of weak luminescence on CMOS VLSI

Photon emission from MOSFETs by hot carrier effect under AC operation is studied. A method to estimate the lifetime of MOSFETs in LSI chips, which uses the photon emission, is proposed. This method is based on experimental data showing that the lifetime of hot-carrier degradation is described by a universal curve with respect to the photon count at a wavelength of 200 nm. Quantitative estimations of lifetimes of MOSFETs in a real LSI are reported. This method is applied to the lifetime estimation of a CMOS microprocessor. >

Hot carrier evaluation of MOSFETs in ULSI circuits using the photon emission method

This system permits measurements of the initial breakdown characteristics, determination of the stress condition, and failure analysis consistently based on the evaluation theory. The failure modes both in initial characteristics and the time-dependent dielectric breakdown (TDDB) characteristics are experimentally found to correspond to each other. The intrinsic breakdown is considered to be caused by the concentration of the current in the edge region. The LOCOS structure plays an important role in the lifetime of the gate oxide. >

http://ieeexplore.ieee.org/iel2/506/4224/00161715.pdf

Evaluation of gate oxide reliability using luminescence method

Techniques combining optical and electrical measurements have been developed for the evaluation of gate oxide reliability. The authors have found that uniformity of the injection current across an electrode is degraded beyond a certain current density which coincides with the onset of Q/sub BD/ lowering under high current density. The authors describe the system architecture and measuring theory and give an application example to show the effectiveness of the method. They also describe the general characteristics of oxide found by using this method. >

http://ieeexplore.ieee.org/iel2/539/1549/00039289.pdf

Evaluation technique of gate oxide reliability with electrical and optical measurements

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