Minsuk Lee

TL;DR: The results show that as the cache refill time increases, the improvement increases, which indicates that accurate prediction of cache-related preemption delay by the proposed technique becomes increasingly important if the current trend of widening speed gap between the processor and main memory continues.

TL;DR: An enhanced technique for analyzing, and thus bounding cache related preemption delay in fixed priority preemptive scheduling focusing on instruction caching is proposed.

TL;DR: The main focus of this paper is on explaining the necessary steps for performing timing analysis of a given target machine within the extended timing schema framework and results from experiments using a timing tool for the target machine that is built based on the extended time schema approach.

TL;DR: A novel scheduling scheme, called LPS (Limited Preemptible Scheduling), is proposed that limits preemptions to predetermined points with small cache-related preemption costs and can increase schedulable utilization and save processor time as compared with a traditional fully preemptible scheduling scheme.