Recently, multilevel inverters (MLIs) have gained lots of interest in industry and academia, as they are changing into a viable technology for numerous applications, such as renewable power conversion system and drives. For these high power and high/medium voltage applications, MLIs are widely used as one of the advanced power converter topologies. To produce high-quality output without the need for a large number of switches, development of reduced switch MLI (RS MLI) topologies has been a major focus of current research. Therefore, this review paper focuses on a number of recently developed MLIs used in various applications. To assist with advanced current research in this field and in the selection of suitable inverter for various applications, significant understanding on these topologies is clearly summarized based on the three categories, i.e., symmetrical, asymmetrical, and modified topologies. This review paper also includes a comparison based on important performance parameters, detailed technical challenges, current focus, and future development trends. By a suitable combination of switches, the MLI produces a staircase output with low harmonic distortion. For a better understanding of the working principle, a single-phase RS MLI topology is experimentally illustrated for different level generation using both fundamental and high switching frequency techniques which will help the readers to gain the utmost knowledge for advance research.

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Recently Developed Reduced Switch Multilevel Inverter for Renewable Energy Integration and Drives Application: Topologies, Comprehensive Analysis and Comparative Evaluation

Three-level converters typically feature low switching loss and small filter size. In order to realize a high-power-density design for three-level converters, SiC MOSFETs may be selected instead of using Si insulated-gate bipolar transistors. However, all-SiC-MOSFET-based converters suffer from extremely high total cost. In this paper, a SiC MOSFET and Si device hybrid active neutral-point-clamped (ANPC) converter is proposed. It consists of four Si active switches and only two SiC MOSFETs. Thus, it has lower total cost compared to the all-SiC-MOSFET-based ANPC converter. Furthermore, a dedicated modulation scheme is proposed to completely move all the switching events from Si devices to SiC MOSFETs by using redundant switching states. As a result, the switching losses are significantly reduced and extremely high efficiency is achieved. The proposed converter has fully utilized the low-switching-loss advantage of SiC MOSFETs and the low-cost advantage of Si devices, which shows significant superiority in high-end grid-connected inverter and rectifier applications.

An Extremely High Efficient Three-Level Active Neutral-Point-Clamped Converter Comprising SiC and Si Hybrid Power Stages

The Neutral Point Clamped (NPC) Multi-Level Inverters (MLI) have been ruling the power electronics industries for the past two decades. The Multi-Carrier Pulse Width Modulation (MCPWM) is common PWM techniques which are widely used in NPC-MLI applications. However, MCPWM is not having a good impact on the balancing of DC-link voltages, Common Mode Voltage (CMV) and limiting the Total Harmonics Distortion (THD). The Selective Harmonic Elimination (SHE) technique is introduced for reducing the THD, however all the switching angles should be maintained less than $\pi $ /2 to keep the eliminated harmonics at constant level which narrows down the modulation index range. Hence, in recent days Space Vector Modulation (SVM) technique is widely used in NPC-MLI, which gives better DC-link voltage balancing, self-neutral point balancing, near-zero CMV reduction, better-quality harmonics profile and switching loss minimization. Hence, it is a preferred solution for the majority of electrical conversion applications such as electric traction, high power industrial drives, renewable power generation, and grid-connected inverters, etc. The paper gives a comprehensive review of the SVM for NPC-MLI. First, this paper deliberates the state of art for two-level SVM and extends it to three-level (3L) SVM. Also compares the 3L SVM performance with other MCPWM techniques. Followed by the various modified MLI SVM techniques in terms of their implementations, DC-link capacitor balancing, and reduction of CMV. Further, the review of MLI SVM is widened to open-end winding Inverters and multiphase MLIs. The final part of this paper discussed the future trends and research directions on MLI SVM techniques and its applications.

/pdf/a-comprehensive-review-on-space-vector-modulation-techniques-4knkky1lpu.pdf

A Comprehensive Review on Space Vector Modulation Techniques for Neutral Point Clamped Multi-Level Inverters

In high-power applications, parallel-operated T-type three-level pulse width modulation (PWM) rectifiers (T3LPRs) are widely employed to improve the power capacity and system reliability. For parallel-operated T3LPRs, there are two important issues need to be properly addressed: 1) the neutral-point potential (NPP) balancing, and 2) the zero sequence circulating current (ZSCC) between the common ac and dc bus. In this paper, the fluctuation of NPP in a T3LPR and the generative mechanism of ZSCC in parallel-operated T3LPRs are first investigated. The zero sequence voltage (ZSV) difference between the parallel-operated T3LPRs is identified as the main excitation source of the ZSCC problem. Meanwhile, the disconnection of the neutral point and the control effect difference of NPP balancing in each T3LPR also affect the ZSCCs within the parallel-operated T3LPRs. To adjust the ZSV of T3LPRs, the dwell time of the positive small voltage vector in each switching period of the converter, which is usually adjusted to balance the NPP, is also required to be controlled to suppress ZSCC. Therefore, in this paper, to avoid the possible conflict, an improved modulation mechanism is designed to guarantee simultaneous ZSCC suppression and NPP balancing. The neutral points of each T3LPR are connected. Then, by adjusting the dwell time of the positive small voltage vector, the charging time of two dc capacitors is adjusted to balance the NPP, and the ZSV differences between different T3LPRs are adjusted to suppress ZSCCs. To avoid the control effect difference of independent NPP balancing in different T3LPRs, all T3LPRs share the same value marking the difference between two dc capacitor voltages. Thus, a communication with a greatly reduced baud rate requirement is needed for NPP balancing to transfer the difference between the two dc capacitor voltages. Moreover, no extra circuit is needed for ZSCC suppression. These approaches make the proposed improved space vector PWM strategy much more practical and easy to employ. The proposed method is verified with experiments on two 3-kW T3LPR prototypes.

Improved Modulation Mechanism of Parallel-Operated T-Type Three-Level PWM Rectifiers for Neutral-Point Potential Balancing and Circulating Current Suppression

Renewable energy systems integration prefers DC–AC converters of high efficiency, low harmonic injection and small size. Multilevel converter (MLC) is preferred compared to two-level converter thanks to its low harmonic injection, even at low switching frequency values, and accepting high power as well as voltage levels. Among reduced switching devices count MLCs is the T-type topology. This article introduces a review of the different advanced topologies of T-type MLC in comparison with the conventional neutral point clamped converters. The operation of each topology, the design consideration and the performance in low-voltage applications such as AC drive systems, grid-tie integration of renewable energy and power train drive applications are discussed. In addition, the design considerations using enhanced semiconductor switches are elaborated. Different studies regarding MLCs—like common-mode voltage elimination or reduction, open-switch fault diagnosis, open- as well as short-circuit fault tolerance, and DC link capacitor voltage balancing for T-type topologies—are illustrated. Finally, recommendations for future work research directions are highlighted.

T-Type Multilevel Converter Topologies: A Comprehensive Review

Due to the high thermal conductivity and the wide band gap, SiC power devices have many advantages against Si power devices such as higher operation temperature, higher breakdown electric field, higher switching speed and less switching loss. In this paper, a SiC-based T-type three-level topology is investigated. Considering the body diode characteristics of SiC power MOSFETs, three kinds of bidirectional switching circuits are presented and compared. One of them, with the lowest conduction loss, is used as the neutral point clamping branch of the T-type three-level inverter. Operation modes and modulation strategy of this inverter are analyzed. A 6 kW prototype using SiC MOSFET is built. The efficiency is tested and compared with a Si-based prototype. Experimental results show that using SiC power devices can improve the conversion efficiency obviously.

A SiC-based T-type three-phase three-level gridtied inverter

The neutral point (NP) potential self-balancing of five-level full bridge inverters with conventional modulation strategy is related to the modulation index. Both the voltages of two split-capacitors should be sampled and controlled, when the inverter operates with the low modulation index. Therefore, an improved modulation strategy is proposed to realize the NP potential self-balancing for five-level full bridge inverters within the whole modulation index range. Only the sum of input split-capacitors voltage needs to be sampled, and the hardware cost is reduced. Experimental results verify the effectiveness of the improved modulation strategy.

Cost effective capacitor voltage balancing control for five-level grid-tied inverters

Neutral-point (NP) potential imbalance is a crucial issue in five-level NP clamped (5L-NPC) full-bridge inverters. The basic idea of the conventional closed-loop NP potential balancing control methods is to sample the voltages of split dc-link capacitors first and then regulate the modulation waveform according to different voltages of split dc-link capactiors. In this paper, an open-loop NP potential balancing control for 5L-NPC full-bridge grid-tied inverters (FB-GCIs) is proposed. A balancing factor $k$ is introduced into the modulation signals and regulated according to the calculation results of the modulation index. Therefore, although the voltages of split dc-link capacitors have not been sampled and controlled, the dc-link capacitor voltages can be balanced over a wide modulation index range. Both the switching states and the NP potential balancing region of the 5L-NPC FB-GCI are analyzed in detail. The design guidelines of the balancing factor $k$ are also presented. A 5L-NPC FB-GCI prototype is built for the experimental tests, and experimental results validate the feasibility and effectiveness of the proposed control method.

A Capacitor Voltage Balancing Control Method for Five-Level Full-Bridge Grid-Tied Inverters Without Split-Capacitor Voltage Sampling

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A SiC-based T-type three-phase three-level gridtied inverter

Cost effective capacitor voltage balancing control for five-level grid-tied inverters

A Capacitor Voltage Balancing Control Method for Five-Level Full-Bridge Grid-Tied Inverters Without Split-Capacitor Voltage Sampling