Ming-Yen Kao
University of California, Berkeley
30 Papers
37 Citations
Ming-Yen Kao is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Capacitance. The author has an hindex of 11, co-authored 23 publications. Previous affiliations of Ming-Yen Kao include National Taiwan University.
Chat about Author
Papers
Proposal for Capacitance Matching in Negative Capacitance Field-Effect Transistors
Harshit Agarwal,Pragya Kushwaha,Yen-Kai Lin,Ming-Yen Kao,Yu-Hung Liao,Avirup Dasgupta,Sayeef Salahuddin,Chenming Hu +7 more
TL;DR: A new approach using multi-layer FE to engineer the shape of negative-capacitance field-effect transistor is discussed, and the results show that it leads to better sub-threshold swing as well as lower power supply.
92
Deep-Learning-Assisted Physics-Driven MOSFET Current-Voltage Modeling
Ming-Yen Kao,Hei Kam,Chenming Hu +2 more
TL;DR: In this paper , the authors proposed using deep learning to improve the accuracy of the partially-physics-based conventional MOSFET currentvoltage model, which can well predict IV, output conductance, and transconductance of a TCAD-simulated gate-all-around transistor (GAAFET) with outstanding 3-sigma errors of 1.3, 4.1%, and 2.9%, respectively.
64
BSIM Compact Model of Quantum Confinement in Advanced Nanosheet FETs
Avirup Dasgupta,Shivendra Singh Parihar,Pragya Kushwaha,Harshit Agarwal,Ming-Yen Kao,Sayeef Salahuddin,Yogesh Singh Chauhan,Chenming Hu +7 more
TL;DR: In this paper, the authors proposed a compact model for nanosheet FETs that takes the effects of quantum confinement into account, and implemented it using Verilog-A in the BSIM-CMG framework for all simulations.
58
Analysis and Modeling of Inner Fringing Field Effect on Negative Capacitance FinFETs
Yen-Kai Lin,Harshit Agarwal,Pragya Kushwaha,Ming-Yen Kao,Yu-Hung Liao,Korok Chatterjee,Sayeef Salahuddin,Chenming Hu +7 more
TL;DR: In this paper, the impact of inner fringing fields on the negative capacitance FinFET (NC-FinFET) and how this scales with the technology node was investigated.
47
Design Optimization Techniques in Nanosheet Transistor for RF Applications
TL;DR: In this article, the effects of stack spacing and number of stacks on device performance were studied and a substack design for improved RF performance was proposed, which can improve cut-off frequency by approximately 10% and minimum number of substacks and minimum substack spacing should be used.
47