In this study, metal–silicide-based contacts to GaN-cap/AlGaN/AlN-spacer/GaN-on-Si heterostructure were investigated. Planar Schottky diodes with Cu-covered anodes comprising silicide layers of various metal–silicon (M–Si) compositions were fabricated and characterized in terms of their electrical parameters and thermal stability. The investigated contacts included Ti–Si, Ta–Si, Co–Si, Ni–Si, Pd–Si, Ir–Si, and Pt–Si layers. Reference diodes with pure Cu or Au/Ni anodes were also examined. To test the thermal stability, selected devices were subjected to subsequent annealing steps in vacuum at incremental temperatures up to 900 °C. The Cu/M–Si anodes showed significantly better thermal stability than the single-layer Cu contact, and in most cases exceeded the stability of the reference Au/Ni contact. The work functions of the sputtered thin layers were determined to support the discussion of the formation mechanism of the Schottky barrier. It was concluded that the barrier heights were dependent on the M–Si composition, although they were not dependent on the work function of the layers. An extended, unified Schottky barrier formation model served as the basis for explaining the complex electrical behavior of the devices under investigation. 

Schottky Barrier Formation Mechanism and Thermal Stability in Au-Free Cu/Metal–Silicide Contacts to GaN-Cap/AlGaN/AlN-Spacer/GaN-on-Si Heterostructure

In this work, we observe the distinct V TH characteristics in the Au-free gate-first processing p-GaN/AIGaN/GaN HEMTs with two commonly used passivation layers, i.e., SiN and SiO 2 . The device with SiN shows a depletion-mode (D-mode) characteristic (V TH ,. .., -5V) whereas the device with SiO 2 passivation exhibits an enhancement-mode (E-mode) characteristic (VTH, ..., +0.7V). Furthermore, Transmission Line Measurement (TLM) devices are fabricated to investigate the effects of the passivation on two dimensional electron gas (2DEG) in p-GaN/AIGaN/GaN stack. The results indicate that a low Rsh is obtained while passivating device surface with SiN layer, suggesting that 2DEG is present, which is most probably due to an unfunctional p-GaN layer. The SIMS results indicate a high H−intensity in the p-GaN/AIGaN/GaN stack with a SiN passivation layer. Thus, P-GaN deactivation due to the formation of complex Mg-H after SiN passivation is proposed to explain the D-mode characteristic in the device with a SiN passivation layer.

Silicon Nitride-induced Threshold Voltage Shift in p-GaN HEMTs with Au-free Gate-first Process

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Silicon Nitride-induced Threshold Voltage Shift in p-GaN HEMTs with Au-free Gate-first Process