This article presents the design and analysis of a double-side-cooled printed circuit board (PCB) embedded silicon carbide (SiC) MOSFET half-bridge package with low loop inductances and an integrated gate driver. The 1.2 kV SiC MOSFET dies used in the half-bridge package are embedded in the PCB using AT&S's patented technique. The dies are cooled and electrically connected to traces in the PCB through copper-filled microvias. The design methodology accounts for both electrical and thermal performance, limiting the power-loop inductance to 2.3 nH and the maximum package temperature to less than the 175 °C limit. The integration of the gate drive circuitry allows for a high power density and 2.2 nH gate-loop inductances. At 0.12 K/W, the measured junction-to-case thermal resistance with double-sided cooling is 57% lower than that of a TO-247 package. Under similar operating conditions, the PCB-embedded half-bridge package also achieves a 5.6 times lower voltage overshoot and a 0.5% higher peak efficiency than a TO-247-based half-bridge. This article reports the first demonstration of PCB-embedded 1.2 kV SiC MOSFET packages in buck, boost, and ac–dc converters. The prototype three-phase ac–dc converter for an electric vehicle on-board charger is composed of six PCB-embedded half-bridge packages and achieves an efficiency of 98.2% and a power density of 182 W/in3.

A PCB-Embedded 1.2 kV SiC MOSFET Half-Bridge Package for a 22 kW AC–DC Converter

Shipboard DC systems, a Critical Overview: Challenges in Primary Distribution, Power Electronics-based Protection, and Power Scalability

The past few years have seen organic substrates become a popular alternative to ceramics substrates for power modules. The design flexibility of organic substrates allows for a high level of integration with the cooling system and gate driver circuitry. Although organic substrates have many benefits, the intrinsic features of the thin dielectric cause thermal and common-mode (CM) current issues. This work aims to address these concerns by modeling and optimizing multi-layer organic substrates for a wirebond-less 1.7 kV SiC MOSFET power module. The geometry and layout are optimized to minimize the module's maximum temperature and high capacitive coupling to the baseplate. The simulation and optimization of multi-layer organic substrate design enable a 30 dB reduction in CM noise while achieving a maximum temperature of less than <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$175\ {{}^{\circ}\mathbf{C}}$</tex> . 

Electro-Thermal Optimization of Common-Mode Screen for Organic Substrate-Based SiC Power Module

This work focuses on the design, fabrication, and testing of 1.7 kV SiC MOSFET switching cells that form the H-bridges of a 250 kW solid-state transformer-based (SST-based) integrated power electronics building block (iPEBB). State-of-the-art multi-layer silicon nitride active metal brazed (AMB) substrates are used to develop an optimal switching cell design for the iPEBB that can handle both hard and soft switching. Electrical and thermal analyses for the switching cell are performed to reduce the power-loop inductance to 3.5 nH and achieve a junction-to-case thermal resistance (Rjc) of $0.285^{\circ}\mathrm{C} /\mathrm{W}$. The switching-cell packaging procedure is presented with testing results. This work will help advance the development of a lightweight, fast-switching iPEBB to serve as the backbone for future power distribution and smart grid systems.

Design, Fabrication, and Testing of a 1.7 kV SiC Switching Cell for a High-Density Integrated Power Electronics Building Block (iPEBB)

The past few years have seen organic substrates become a popular alternative to ceramics substrates for power modules. The design flexibility of organic substrates allows for a high level of integration with the cooling system and gate driver circuitry. Although organic substrates have many benefits, the intrinsic features of the thin dielectric cause thermal and common-mode (CM) current issues. This work aims to address these concerns by modeling and optimizing multi-layer organic substrates for a wirebond-less 1.7 kV SiC MOSFET power module. The geometry and layout are optimized to minimize the module's maximum temperature and high capacitive coupling to the baseplate. The simulation and optimization of multi-layer organic substrate design enable a 30 dB reduction in CM noise while achieving a maximum temperature of less than $175\ {{}^{\circ}\mathbf{C}}$.

This paper presents the design of an integrated power electronics building block (iPEBB) for high-density systems. The design begins with exploring state-of-the-art substrates that will serve as the foundation for the iPEBB. Due to the integrated design, the substrate plays a vital role in the thermal, electrical, and mechanical performance, and contributes to the weight and reliability of the iPEBB. State-of-the-art organic direct bonded copper (ODBC) substrates are evaluated in this work. Multi-domain simulations are used to design the integrated SiC bridges to achieve a power loop inductance of 3.5 nH, a maximum temperature of 175 °C, and a weight of 16 kg. A half-bridge module prototype is fabricated and tested to provide insight into the substrate functionality and to aid in the refinement of the iPEBB concept.

Design of a High-Density Integrated Power Electronics Building Block (iPEBB) Based on 1.7 kV SiC MOSFETs on a Common Substrate

This work demonstrates a novel charge-balanced (CB) silicon carbide (SiC) MOSFET that boasts a specific on-resistance of 10 mΩ•cm2 at 4.5 kV breakdown voltage, surpassing the 1-D SiC unipolar limit. This is achieved through buried p-doped regions inside the drift layers, which are more easily scalable to higher voltages compared to the p-doped pillars used in super-junction (SJ) devices. Medium-voltage CB SiC MOSFETs with different p-doped bus widths and pitches have been fabricated and characterized in this work. The unique microstructure of these devices causes interesting macro-scale characteristics, such as distinctive steps in the capacitance–voltage curves and a turn-on voltage tail that reduces with increased temperature. The switching energy of the CB MOSFET is 92% lower than that of an IGBT at 150 °C. This paper presents and interprets these intriguing static and dynamic characteristics.

Characterization of 4.5 kV Charge-Balanced SiC MOSFETs

Handle everyday research tasks with reliable, citation-backed results

Your personal Research Agent to handle research tasks with citation-backed results

Popular Tasks used by Researchers

How can I help with your research?

Meet SciSpace

Get more enhanced response by uploading the PDFs you want me to reference.

No relevant PDFs in your library

SciSpace is the AI research assistant for academics. Run systematic literature reviews on 280M+ papers, and write papers with cited sources. Trusted by 1M+ students, PhDs & researchers.

SciSpace | AI for Research

Analyze PDFs

Code & Manuscripts

Funding & Grants

Literature & Patents

Medical & Clinical Data

Systematic Review

Visualize & Present

Web & Data

Build a Google Scholar-like website for your research.

Build a website

Create charts and images for your research

Create a Chart

Write a paper for submission to a journal

Draft a manuscript

Patent Search

Design eye-catching scientific posters in minutes.

Scientific Poster Generation

Systematic Literature Review

One task is running at the moment. Your messages will be shown right after.

Drag and drop or click here to browse

Loved by <highlight>1 million+</highlight> researchers

Extract a list of specific topics and their sources from unstructured text

Topics

Compare and analyze relevant papers that matches with your search

Papers

Get insights from PDFs and bookmarked papers from your library

My library

Recent searches

Try searching for:

Catch AI-generated content in scholarly and non-scholarly content

{ai} Detector

Ai Writer

Get PDF Summaries, highlighted text explanations 

Chat with PDF

Effortlessly create in-text citations and bibliographies in APA and 2,500 other formats

Citation generator

Get explanations, summaries, and answers on academic papers

Ease up your research workflow with {scispace}'s cohort of exciting AI tools

Elevate your academic writing skills and convey your ideas the way you want

Paraphraser

Explore our range of reading and writing tools

Your file is being prepared and should be ready in a few minutes. If it's a large file, it might take a bit longer. You can close this window, and we'll email you the file when it's done.

You have reached a maximum limit of <strong>{limit}</strong> columns in the table. Remove at least <strong>1</strong> column to add or create another one.

Mina Shawky

Author Tools

Chat about Author

Papers

Design of a High-Density Integrated Power Electronics Building Block (iPEBB) Based on 1.7 kV SiC MOSFETs on a Common Substrate

Characterization of 4.5 kV Charge-Balanced SiC MOSFETs