A WLP device is provided with a flange shaped UBM or an embedded partial solder ball UBM on top of a copper post style circuit connection.

Enhanced WLP for superior temp cycling, drop test and high current applications

A method for manufacturing an electronic product, includes: obtaining a flexible, optically substantially transparent or translucent, substrate sheet; printing a number of electrical conductors on the substrate sheet in accordance with a predefined schematic; printing or disposing a number of electronic components including optoelectronic light emissive, preferably LED (light-emitting diode), components on the substrate sheet in accordance with the schematic, wherein at least some of the printed conductors are configured to provide electrical current thereto; and attaching a flexible, optically substantially transparent, lightguide sheet to the substrate so as to establish a functional multi-layer structure, where the light emitted by the light emissive components is incoupled to the lightguide, propagates therewithin, and is at least partly outcoupled to the environment through the substrate sheet. Related arrangement and electronic device are presented.

Method for manufacturing electronic products, related arrangement and product

A composite layer composed of an Ni layer and a Pd layer is formed on a solder pad, and a solder on the composite layer is composed of a solder containing no lead. Because a Pd layer (palladium layer) reduces phenomenons such as repellency of the solder, adhesiveness with the solder can be enhanced. Because a Pd layer has a higher degree of rigidity than a gold layer, thermal stress is absorbed into the Pd layer and buffered so as to reduce the degree of transmission of stress to the solder bump, or to the solder layer, by thermal stress.

Printed wiring board and method for manufacturing printed wiring board

Flexible substrates can be temporarily attached to a rigid carrier for processing a surface thereof by depositing a joining material at one or more contact points between a flexible substrate and a rigid carrier, contacting the flexible substrate and the rigid carrier at the one or more contact points; and exposing the one or more contact points to a temperature of between 219 °C and 1000 °C and under conditions suitable for attaching the flexible substrate and the rigid carrier at the one or more contact points via the joining material. Examples of suitable joining materials include, but are not limited to soldering or brazing materials. Such supported substrates can be used for preparing flexible displays comprising at least one electronic component and/or circuit on a surface of the flexible display.

Methods for attaching flexible substrates to rigid carriers and resulting devices

The present invention relates to a chip having a bump and a package having the same. The chip includes a chip body, at least one via, a passivation layer, an under ball metal layer and at least one bump. The via penetrates the chip body, and is exposed to a surface of the chip body. The passivation layer is disposed on the surface of the chip body, and the passivation layer has at least one opening. The opening exposes the via. The under ball metal layer is disposed in the opening of the passivation layer, and is connected to the via. The bump is disposed on the under ball metal layer, and includes a first metal layer, a second metal layer and a third metal layer. The first metal layer is disposed on the under ball metal layer. The second metal layer is disposed on the first metal layer. The third metal layer is disposed on the second metal layer. As the bumps can connect two chips, the chip is stackable, and so the density of the product is increased while the size of the product is reduced.

Chip having a bump and package having the same

Solder bump structures, which comprise a solder bump on a UBM structure, are provided for operation at temperatures of 2500C and above. According to a first embodiment, the UBM structure comprises layers of Ni-P, Pd-P, and gold, wherein the Ni-P and Pd-P layers act as barrier and/or solderable/bondable layers. The gold layer acts as a protective layer. According to second embodiment, the UBM structure comprises layers of Ni-P and gold, wherein the Ni-P layer acts as a diffusion barrier as well as a solderable/bondable layer, and the gold acts as a protective layer. According to a third embodiment, the UBM structure comprises: (i) a thin layer of metal, such as titanium or aluminum or Ti/W alloy; (ii) a metal, such as NiV, W, Ti, Pt, TiW alloy or Ti/W/N alloy; and (iii) a metal alloy such as Pd-P, Ni-P, NiV, or TiW, followed by a layer of gold. Alternatively, a gold, silver, or palladium bump may be used instead of a solder bump in the UBM structure.

Solder bump/under bump metallurgy structure for high temperature applications

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Solder bump/under bump metallurgy structure for high temperature applications