Lateral DMOS transistors are widely used in mixed-signal integrated-circuit design as integrated high-voltage switches and drivers. The LDMOS with shallow-trench isolation (STI) is the device of choice to achieve voltage and current capability integrated in the basic CMOS processes. In this review, the electrical characteristics of the STI-based LDMOS transistors are investigated over an extended range of operating conditions through experiments and numerical analysis. The LDMOS high electric-field characteristics are explained to the purpose of investigating the effects on reliability and device performance under hot-carrier stress (HCS) conditions. A review of the HCS modeling is addressed to provide an understanding of the degradation kinetics and mechanisms. TCAD simulations of the degradation are finally proposed to explain the HCS effects on a wide range of biases and temperatures, confirming the experimental results.

Characterization and modeling of electrical stress degradation in STI-based integrated power devices

Advanced 0.16 μm BCD technology platform offering dense logic transistors (1.8 V-5 V CMOS) and high performance analog features has been developed. Thanks to dedicated field plate optimization, body and drain engineering, state of the art power devices (8 V to 42 V rated) have been obtained ensuring large Safe Operating Areas with best RONXAREA-BVDSS tradeoff.

BCD8sP: An advanced 0.16 μm technology platform with state of the art power devices

We experimentally demonstrate a Super-Junction LDMOS transistor in a 0.18 µm BCD technology. The buffered Super-Junction structure is implemented by the use of existing N- and P-drift layer, which are optimized for conventional 20V to 30V LDMOS transistors. The breakdown voltage and the specific on-resistance of the fabricated Super-Junction LDMOS are 98.6 V and 1.01 mΩ⋅cm2, respectively. The TLP measurement results show fairly good electrical SOA characteristics up to 78V for all gate voltages.

Implementation of buffered Super-Junction LDMOS in a 0.18um BCD process

This paper presents BCD process integrating 7V to 70V power devices on 0.13um CMOS platform for various power management applications. BJT, Zener diode and Schottky diode are available and non-volatile memory is embedded as well. LDMOS shows best-in-class specific Ron (R SP ) vs. BV DSS characteristics (i.e., 70V NMOS has R SP of 69mΩ-mm2 with BV DSS of 89V). Modular process scheme is used for flexibility to various requirements of applications.

Advanced 0.13um smart power technology from 7V to 70V

0.18μm BCD technology with the best-in-class nLDMOS is presented. The drift of nLDMOS is optimized to ensure lowest Rsp by using multi-implants and appropriate thermal recipe. The optimized 24V nLDMOS has BV DSS =36V and Rsp=14.5 mΩ-mm2. Electrical SOA and long-term hot electron (HE) SOA are also evaluated. The maximum operating voltage less than 10% degradation of on-resistance is 24.4V.

BD180LV - 0.18 μm BCD technology with best-in-class LDMOS from 7V to 30V

We present a new BCD technology in a 0.18 μm technology platforms with a capability of 7 to 60V high-voltage devices such as DEMOS and LDMOS. The developed 0.18 mum BCD process provides various kinds of high voltage LDMOS such as 7, 12, 20, 50, 60 V LDMOS transistors for variety of applications. The power LDMOS transistors in the process have very competitive specific on-resistance compared to previous results.

BD180 - a new 0.18 μm BCD (Bipolar-CMOS-DMOS) Technology from 7V to 60V

A versatile 30V analog CMOS process in a 0.18 μm technology node has been developed by using cost-effective and modular fashion. To reduce the thermal budget deep NWELL isolation is formed after CMOS well formation. The drain-extended (DE) CMOS from 7V to 30V shows very competitive trade-off performance between the breakdown voltage and the specific on-resistance. In addition, low 1/f noise of 5V CMOS can be obtained by pure gate oxide process.

A versatile 30V analog CMOS process in a 0.18μm technology for power management application

Handle everyday research tasks with reliable, citation-backed results

Your personal Research Agent to handle research tasks with citation-backed results

Popular Tasks used by Researchers

How can I help with your research?

Meet SciSpace

Get more enhanced response by uploading the PDFs you want me to reference.

No relevant PDFs in your library

SciSpace is the AI research assistant for academics. Run systematic literature reviews on 280M+ papers, and write papers with cited sources. Trusted by 1M+ students, PhDs & researchers.

SciSpace | AI for Research

Analyze PDFs

Code & Manuscripts

Funding & Grants

Literature & Patents

Medical & Clinical Data

Systematic Review

Visualize & Present

Web & Data

Build a Google Scholar-like website for your research.

Build a website

Create charts and images for your research

Create a Chart

Write a paper for submission to a journal

Draft a manuscript

Patent Search

Design eye-catching scientific posters in minutes.

Scientific Poster Generation

Systematic Literature Review

One task is running at the moment. Your messages will be shown right after.

Drag and drop or click here to browse

Loved by <highlight>1 million+</highlight> researchers

Extract a list of specific topics and their sources from unstructured text

Topics

Compare and analyze relevant papers that matches with your search

Papers

Get insights from PDFs and bookmarked papers from your library

My library

Recent searches

Try searching for:

Catch AI-generated content in scholarly and non-scholarly content

{ai} Detector

Ai Writer

Get PDF Summaries, highlighted text explanations 

Chat with PDF

Effortlessly create in-text citations and bibliographies in APA and 2,500 other formats

Citation generator

Get explanations, summaries, and answers on academic papers

Ease up your research workflow with {scispace}'s cohort of exciting AI tools

Elevate your academic writing skills and convey your ideas the way you want

Paraphraser

Explore our range of reading and writing tools

Your file is being prepared and should be ready in a few minutes. If it's a large file, it might take a bit longer. You can close this window, and we'll email you the file when it's done.

You have reached a maximum limit of <strong>{limit}</strong> columns in the table. Remove at least <strong>1</strong> column to add or create another one.

Mi-Young Kim

Author Tools

Chat about Author

Papers

BD180 - a new 0.18 μm BCD (Bipolar-CMOS-DMOS) Technology from 7V to 60V

A versatile 30V analog CMOS process in a 0.18μm technology for power management application