Negabinary is a component of the positional number system. A complete set of negabinary arithmetic operations are presented, including the basic addition/subtraction logic, the two-step carry-free addition/subtraction algorithm based on negabinary signed-digit (NSD) representation, parallel multiplication, and the fast conversion from NSD to the normal negabinary in the carry-look-ahead mode. All the arithmetic operations can be performed with binary logic. By programming the binary reference bits, addition and subtraction can be realized in parallel with the same binary logic functions. This offers a technique to perform space-variant arithmetic-logic functions with space-invariant instructions. Multiplication can be performed in the tree structure and it is simpler than the modified signed-digit (MSD) counterpart. The parallelism of the algorithms is very suitable for optical implementation. Correspondingly, a general-purpose optical logic system using an electron trapping device is suggested. Various complex logic functions can be performed by programming the illumination of the data arrays without additional temporal latency of the intermediate results. The system can be compact. These properties make the proposed negabinary arithmetic-logic system a strong candidate for future applications in digital optical computing with the development of smart pixel arrays. (C) 1999 Society of Photo-Optical Instrumentation Engineers. [S0091-3286(99)00803-X].

Parallel optical negabinary signed-digit computing: algorithm and optical implementation

Most common uses of negatively weighted bits (negabits), normally assuming arithmetic value 21(0) for logical 1(0) state, are as the most significant bit of 2's-complement numbers and negative component in binary signed-digit (BSD) representation. More recently, weighted bit-set (WBS) encoding of generalised digit sets and practice of inverted encoding of negabits (IEN) have allowed for easy handling of any equally weighted mix of negabits and ordinary bits (posibits) via standard arithmetic cells (e.g., half/full adders, compressors, and counters), which are highly optimised for a host of simple and composite figures of merit involving delay, power, and area, and are continually improving due to their wide applicability. In this paper, we aim to promote WBS and IEN as new design concepts for designers of computer arithmetic circuits. We provide a few relevant examples from previously designed logical circuits and redesigns of established circuits such as 2's-complement multipliers and modified booth recoders. Furthermore, we present a modulo-(2 n + 1) multiplier, where partial products are represented in WBS with IEN. We show that by using standard reduction cells, partial products can be reduced to two. The result is then converted, in constant time, to BSD representation and, via simple addition, to final sum.

http://faculties.sbu.ac.ir/~jaberipur/Papers/Journals/22.pdf

Efficient realisation of arithmetic algorithms with weighted collection of posibits and negabits

Efficient one-step addition and subtraction algorithms are pro- posed. The arithmetic operations use the negabinary modified signed- digit number representation, which is an extension of the negabinary number system. Truth tables representing the required symbolic substi- tution computation rules are determined. Then a reduction of the number of the symbolic substitution computation rules is achieved by considering the digits in the lower positions of the negabinary modified signed digits in the computation. The proposed algorithms are very suitable for optical holographic and nonholographic implementations. An incoherent corre- lation based on the efficient shared content-addressable memory (SCAM) is suggested as an optoelectronics implementation. © 2004 Soci-

Efficient optical negabinary modified signed-digit arithmetic: one-step addition and subtraction algorithms

A new redundant representation of signals with continuous valued digits enables introduction of more complex analog processing elements in a digital architecture. Continuous valued digits allow better utilization of the potential accuracy in VLSI technologies. The proposed processing methodology can be applied in an analog or in a digital system, and with either truly continuous digits, or with discrete valued digits. Coding and de-coding is relatively simple and robust. Overlap resolution signal processing utilizes residue-like arithmetic and opens up a powerful approach to parallel analog computations with digital accuracy.

Overlap resolution: continuous valued digits for hybrid architectures

(2m± 1) [HGS83b]. (d, k) [MR82]. (N,K) [KK86]. 1 [wu87b]. 1/2 [ZW87]. 2 [FLN89, Jes80a, KR82, RY82]. 2(log2N)− 1 [Lee85b]. 2/3 [ZW87]. 22n+ 1 [STR87]. 2m [PNH88]. 3 [WH88]. 4 [KW81, TPSS85]. 5.8n log2 n [CW80]. 8 [Kal83]. [lgN + 1] [CT84a]. 2 [DD81, Eti80, FM89]. 2.5 [DM84]. p [SLS82]. n [HSE84]. AB [Bla83, Slo85]. D [Kak85, Kak83, LB88, SW82, WV87, WR81]. d > t [LB88]. ` [Hoc83]. GF (2) [Fen89, WTS85, YRT84, Zho88]. GF (P ) [TKL86, HQR89]. GF [p] [Eng81]. K [GM87, NHAT89, Agg86, BL84, CI88, CE87, Dav89, Lee82, LC87b]. L/U [JK82]. λT [CGMP87]. M [Bla83, Mor80, Slo85, WH80a, Wus81, GH83b, HGS83b, PNH88]. m2 [MM83a]. N [CS87, Er84, Esf89, Mor80, Wus81, AP89, AG81b, Bha83a, GH83b, Kha82, LM87a]. n− 1/n [Nil84, Wen85, Can83]. O(2) [Jia86]. O(log n) [BP85]. O(n) [Sip82]. O(n+ k) [LD88]. O(N/ log N) [SR81a]. O(t + |E|) [Sul88]. P [Tha82, Tha84b, TKL86, YF88, Fro83, GNK86, KM83b, Wus82]. r [GH83a, HGS83a]. s [SSS89]. t [BV89, CA89, LB88, NGP86].

/pdf/a-bibliography-of-ieee-transactions-on-computers-1980-1989-4w2o1p889u.pdf

A Bibliography of IEEE Transactions on Computers (1980{1989)

A unified approach to a broad class of finite number representation systems is proposed. This class contains aDl positive and negative radix systems and other well-known number systems. In addition, it can be extended to include imaginary radix number systems. The proposed approach enables us to develop a single set of algoritims for arithmetic operations.

On Classes of Positive, Negative, and Imaginary Radix Number Systems

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On Classes of Positive, Negative, and Imaginary Radix Number Systems