Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

Image classification is an important task in computer vision. In this paper, we propose a supervised method for image classification based on a fast beta wavelet networks (FBWN) model. First, the structure of the wavelet network is detailed. Then, to enhance the performance of wavelet networks, a novel learning algorithm based on the Fast Wavelet Transform (FWTLA) is proposed. It has many advantages compared to other algorithms, in which we solve the problem of the previous works, when the weights of the hidden layer to the output layer are determinate by applying the back propagation algorithm or by direct solution which requires to compute matrix inversion, this may be intensive computation when the learning data is too large. However, the new algorithm is realized by the iterative application of FWT to compute connection weights. In the simulation part, the proposed method is employed to classify images. Comparisons with classical wavelet network classifier are presented and discussed. Results of comparison have shown that the FBWN model performs better than the previously established model in the context of training run time and classification rate.

FBWN: An architecture of fast beta wavelet networks for image classification

This paper deals with the implementation of a CMOS analog neural network (NN) that has to be integrated in a new kind of optoelectronic measurement system. The aim is to achieve real-time surface recognition using a phase-shift rangefinder and a neural network. NN architecture is a multilayer perceptron (MLP) with two analog input signals provided by the rangefinder, three processing neurons in the hidden layer, and one output neuron whose output voltage indicates the detected surface. As the complete structure is analog, no analog-to-digital conversions or signal processing between the rangefinder and the network is necessary. Furthermore, the 3.3-V voltage supply, relative to the chosen CMOS 0.35-mum technology, allows to reduce the system power consumption. This paper focuses on the implementation in an ASIC of an elementary part of the NN, called neuron, and on the achievement of the complete NN from the integration of three ASICs in a printed circuit board. Comparisons between ideal case, simulations and tests are detailed in order to validate the design and the good functioning of the complete structure.

Analog Neural Network Implementation for a Real-Time Surface Classification Application

ADEL M. ALIMI∗, RADHIA HASSINE∗∗, MOHAMED SELMI∗∗∗ ∗ REGIM: REsearch Group on Intelligent Machines, Department of Electrical Engineering University of Sfax, ENIS, BP W, Sfax 3038, Tunisia e-mail: Adel.Alimi@ieee.org ∗∗ Department of Mathematics, Faculty of Sciences of Monastir Boulevard de l’environnement, Monastir 5000, Tunisia e-mail: Radhia.Hassine@fsm.rnu.tn ∗∗∗ Laboratory of Physics and Mathematics, Department of Mathematics Faculty of Sciences of Sfax, Sfax 3038, Tunisia e-mail: Mohamed.Selmi@fss.rnu.tn

/pdf/beta-fuzzy-logic-systems-approximation-properties-in-the-557nlp14ng.pdf

Beta fuzzy logic systems approximation properties in the mimo case

We propose two evolutionary neural network-training algorithms for Beta basis function neural networks (BBFNN). Classic training algorithms for neural networks start with a predetermined network structure, and so the quality of the response of the BBFNN depends strongly on its structure. Generally, the network resulting from learning applied to a predetermined architecture is either insufficient or overcomplicated.This paper describes two genetic learning models of the BBFNN. The first continuous genetic model changes the number of neurons in the hidden layer through the application of specific genetic operators. Each network is coded as a variable length string and some new genetic operators are proposed to evolve a population of individuals. A function is proposed to evaluate the fitness of individual networks. Applications to function approximation problems are considered to demonstrate the performance of the BBFNN and of the evolutionary algorithm. For the second discrete genetic model, each network is coded as a matrix for which number of rows is equal to the number of parameters in the function that will be approximated. The genetic algorithm operators change the number of neurons in the hidden layer. Some applications to functions with one and two parameters are considered to demonstrate the performance of the genetic model and the ability of genetic algorithm to be used for the design of BBFNN.

A genetic-designed beta basis function neural network for multi-variable functions approximation

The great flexibility of the Beta function and its universal approximation characteristics, make Beta basis function neural networks (BBFNNs) very useful. We present a hardware implementation of the Beta neuron. The proposed circuit was designed by using a standard bipolar technology. PSPICE simulations show the good concordance of the output of our circuit with the analytic Beta function. We also successfully integrated the electronic Beta neuron in the design of a BBFNN that approximates a nonlinear mapping.

A bipolar implementation of the Beta neuron

Much work has been undertaken to demonstrate the advantages of analog VLSI for implementing neural architectures This paper attempts to address the issues concerning off-chip learning with analog VLSI multilayer perceptron networks A 35-10-10 multilayer feedforward neural network for character recognition is implemented using current mode analog CMOS technology The confusion matrix was introduced to evaluate the retrieval ability of the neural network, since perfect character recognition is, in general, not achieved PSPICE electrical simulations are presented and discussed These simulations proved the validity of our neural hardware implementation and the fact that numerical recognition could be easily implemented with off-chip learning techniques

A hardware implementation of neural network for the recognition of printed numerals

Beta Basis Function Neural Networks (BBFNN) are powerful systems for learning and universal approximation characteristics. In this paper, we present a hardware implementation of the Beta neuron using the CMOS subthreshold-mode. We describe a low power low voltage analog Beta neuron circuit. Three main modules are used to realize the Beta function: a logarithmic current to voltage converter, a multiplier and an exponential voltage to current converter. Simulation results prove the validity of our neural hardware implementation. The control parameters of the Beta function are independent and are made easily by current sources. This analog implementation can be used easily to realize analog BBFNN.

A Beta neuron in CMOS subthreshold mode

Beta basis function neural networks (BBFNNs) are powerful systems for learning and universal approximation. In this paper, we present a hardware implementation of the Beta neuron using the CMOS subthreshold mode. We describe the low power–low voltage analogue Beta neuron circuit. Three main modules are used to realize the electronic Beta function: a logarithmic currentto-voltage converter, a multiplier and an exponential voltage-to-current converter. Simulation results show the validity of our neural hardware implementation. The parameters of the electronic Beta function are controlled independently by current sources. This analogue implementation could be used easily to realize analogue BBFNNs.

A Beta basis function neural network in CMOS subthreshold mode

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A bipolar implementation of the Beta neuron

A hardware implementation of neural network for the recognition of printed numerals

A Beta neuron in CMOS subthreshold mode

A Beta basis function neural network in CMOS subthreshold mode