This paper reviews the present knowledge on tantalum pentoxide (Ta 2 O 5 ) thin films and their applications in the field of microelectronics and integrated microtechnologies. Different methods used to produce tantalum oxide layers are described, emphazing elaboration mechanisms and key parameters for each technique. We also review recent advances in the deposition of Ta 2 O 5 in the particular field of microelectronics where high quality layers are required from the structural and electrical points of view. The physical, structural, optical, chemical and electrical properties of tantalum oxide thin films on semiconductors are then presented and essential film parameters, such as optical index, film density or dielectric permittivity, are discussed. After a reminder of the basic mechanisms that control the bulk electrical conduction in insulating films, we carefully examine the origin of leakage currents in Ta 2 O 5 and present the state-of-the-art concerning the insulating behaviour of tantalum oxide layers. Finally, applications of tantalum oxide thin films are presented in the last part of this paper. We show how Ta 2 O 5 has been employed as an antireflection coating, insulating layer, gate oxide, corrosion resistant material, and sensitive layer in a wide variety of components, circuits and sensors.

Tantalum pentoxide (Ta2O5) thin films for advanced dielectric applications

SiO2 as an insulator for SiC devices

Cluster tool furnace technology was used to control the growth of extremely uniform ultra-thin 1.5 nm to 3 nm SiO2 layers on Si. The transition from Fowler-Nordheim tunneling to direct tunneling electron injection for sub-3-nm oxide poly-Si gate metal-oxide-silicon capacitor structures is described and the influence on the oxide reliability is discussed. It is shown that oxide breakdown can still occur at low voltages in the direct tunneling regime under the condition of electron injection from the poly-Si gate. Soft breakdown of these ultra-thin oxide layers, accompanied by the occurrence of complex fluctuations in the direct tunneling current, is demonstrated. Using this as the definition of sub-3-nm oxide breakdown, it is shown for the first time that the time to dielectric breakdown of the sub-3-nm gate oxide in the direct tunneling regime is determined by the electrical field strength in the oxide similarly to the case of the sub-3-nm dielectric breakdown in Fowler-Nordheim tunnel stressing.

Reliability of Ultra-Thin Gate Oxide Below 3 nm in the Direct Tunneling Regime

Plasma-assisted chemical vapor deposited silicon oxynitride as an alternative material for gate dielectric in MOS devices

A method of preventing diffusion penetration of the dopant used to dope polysilicon gate material in a MOSFET is disclosed. Atomic nitrogen is introduced into the substrate prior to gate oxide growth. The nitrogen later diffuses upward into the gate oxide and blocks subsequent ion implanted gate dopants from penetrating to the substrate. Low dosages of atomic nitrogen implantation, while not significantly affecting gate oxide growth rate, produce significant improvements in the damage immunity of thin gate oxides.

Semiconductor device fabrication

Recent developments in ultra thin oxynitride gate dielectrics

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Recent developments in ultra thin oxynitride gate dielectrics