Luca Benini
University of Bologna
1601 Papers
14.8K Citations
Luca Benini is an academic researcher from University of Bologna. The author has contributed to research in topics: Computer science & Efficient energy use. The author has an hindex of 101, co-authored 1453 publications. Previous affiliations of Luca Benini include ETH Zurich & Delft University of Technology.
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Papers
A wearable EEG-based drowsiness detection system with blink duration and alpha waves analysis
Victor Kartsch,Simone Benatti,Davide Rossi,Luca Benini +3 more
- 01 Jan 2017
TL;DR: A wearable system capable of detecting drowsiness conditions and emitting alarms using only EEG signals, with three levels of alarm based on the blink duration and on the spectral power of alpha waves, which is much more lightweight and compact than other state of the art methods.
Adaptive least mean square behavioral power modeling
Alessandro Bogliolo,Luca Benini,G. De Micheli +2 more
- 17 Mar 1997
TL;DR: This work proposes an effective solution to the main challenges of behavioral power modeling: the generation of models for the power dissipation of technology-independent soft macros and the strong dependence of power from input pattern statistics.
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A control theoretic approach to energy-efficient pipelined computation in MPSoCs
TL;DR: A control theoretic approach to dynamic voltage/frequency scaling (DVFS) in a pipelined MPSoC architecture with soft real-time constraints, aimed at minimizing energy consumption with throughput guarantees is described.
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A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets
TL;DR: An efficient near-memory acceleration engine called NTX that can be used to train state-of-the-art deep convolutional neural networks at scale that achieves above 95 percent parallel and energy efficiency and demonstrates a energy efficiency improvement of NTX over contemporary GPUs.
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Reliability-aware design for nanometer-scale devices
David Atienza,G. De Micheli,Luca Benini,José L. Ayala,P.G. Del Valle,Michael DeBole,Vijaykrishnan Narayanan +6 more
- 21 Jan 2008
TL;DR: This paper illustrates with a case study of an embedded processor that effective reliability-aware design can be achieved in nanometer-scale devices through integral design approaches that covers modeling and exploration of reliability effects, and hardware-software architectural techniques to provide reliability-enhanced solutions at both microarchitectural- and system-level.