A system and method for simulating new instructions without compiler support for the new instructions. A simulator detects a given region in code generated by a compiler. The given region may be a candidate for vectorization or may be a region already vectorized. In response to the detection, the simulator suspends execution of a time-based simulation. The simulator then serially executes the region for at least two iterations using a functional-based simulation and using instructions with operands which correspond to P or less lanes of single-instruction-multiple-data (SIMD) execution. The value P is a maximum number of lanes of SIMD exection supported both by the compiler. The simulator stores checkpoint state during the serial execution. In response to determining no inter-iteration memory dependencies exist, the simulator returns to the time-based simulation and resumes execution using N-wide vector instructions.

Simulating vector execution

Machine Learning-Driven GCC Loop Unrolling Optimization: Compiler Performance Enhancement Strategy Based on XGBoost

SIMD extension is an acceleration component integrated into the general processor for developing data level parallelism in multimedia and scientific computing applications.Control dependence hinders exploiting data level parallelism in the programs.Current vectorization methods in the presence of control flow,loop-based or SLP,all need if-conversion.They do not consider the SIMD parallelism in programs,and thus result in a lower SIMD executing efficiency.Another factor that leads to low efficiency is the lack of cost model to direct SIMD code generation in the presence of control flow.To address these problems,an improved control flow SIMD vectorization method is proposed.First,loop distribution with control dependence is put up to separate the vectorizable parts and unvectorizable parts,taking data locality into account simultaneously.Second,a direct vectorization method of control flow is presented considering the reuse of data between basic blocks.Finally,cost model is used to guide the generation of select and BOSCCs to improve the efficiency of SIMD code.Experimental results show that the code performance generated by the improved methods increase by 24％ compared with those of the existing control flow vectorization methods.

Improved SIMD Vectorization Method in the Presence of Control Flow

SIMD extension is an acceleration component integrated into the general processor,aiming at exploiting data level parallelism in multimedia and scientific computation programs.Two of the mainstream vectorization methods are loop-based method oriented to inter-iteration and SLP method oriented to intra-iteration.Derived from SLP,loop-aware method transforms inter-iteration to intra-iteration through loop unrolling,so as to obtain enough isomorphic statements and then uses SLP to explore vectorization.However,when loop unrolling is illegal or SIMD parallelism is lower than the vector factor,loop-aware method cannot exploit SIMD parallelism of programs.To address this drawback,a vectorization method guided by SIMD parallelism for loops is proposed.Alternative scheme for loop vectorization is constructed in view of inter-iteration parallelism,intra-iteration parallelism and vector factor.Simultaneously,insufficient vectorization is proposed to vectorize loops whose parallelism is lower than the vector factor.Lastly,vectorized loop is unrolled according to SIMD parallelism.Test results by benchmarks show that vectorization method guided by SIMD parallelism outperforms loop-aware method by 107.5％.Moreover,the performance is improved by 12.1％ compared with loop-aware method.

Loop Vectorization Method Guided by SIMD Parallelism

It is difficult to complete the accurate analysis of loop performance using current procedure. The method uses the idea of feedback optimization, combined with some static analysis method, without the support of hardware architecture. Experimental result manifest that the method can complete accurate loop-level performance analysis, help the programmers finding the hot-spot and analyzing the program.

A new method of loop performance analysis

The main popular vectorization methods for the SIMD extension dig the parallelism of the programs relying on the compiler's data dependence analysis. But the data dependence analysis can not deal with the non-structured control flow statements. Therefore, the up-to-date compilers are extremely limited to vectorize these statements. Here is a vectorization method of the export branch for the SIMD extension, which can automatically and effectively vectorize the export branch within the vector length. And the results of performance test show that this method can both fully ensure the semantic correctness of the control flow and exploit the parallelism of the data flow.

A Vectorization Method of Export Branch for SIMD Extension

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A new method of loop performance analysis

A Vectorization Method of Export Branch for SIMD Extension