A millimeter wave (mm-Wave) power amplifier (PA) based on transformer matching network is presented in this paper. Two-stage common source (CS) differential structure PA is proposed which adopts cross-coupling capacitors to improve the stability and gain of the circuit, transformers are designed to simplify the design of impedance matching networks. Output matching is designed as a strongly coupled transformer to achieve low insertion loss, high output power and high efficiency, while the input and inter matching network is designed with low K (coupling coefficient) transformer to achieve better bandwidth. Designed and implemented in 65-nm CMOS technology with 1-V supply, the prototype delivers a saturated output power (Psat) of 15.2 dBm at 40 GHz, the maximum small-signal gain is 16.9 dB, and output IdB compression power (OPldB) is 12.41dBm with its corresponding power added efficiency (PAE) is 17.65%. The chip size is only 0.05 mm2 excluding all DC pads.

A 40-GHz Power Amplifier With Output Power of 15.2 dBm in 65-nm CMOS

An 84GHz DAT-based power amplifier with 18dBm Psat utilizing an ultra-symmetric dual-differential power divider

A 23-29.5 GHz Differential Power Amplifier in a 45-nm SOI CMOS Technology for 5G Millimeter-Wave Application

This paper presents a 26GHz power amplifier for high band 5G application in 65nm CMOS technology. By using three stage differential common source topology plus final four-way power combiner, 24dB gain of PA is achieved at millimeter wave frequency. Capacitors, Complicated inductors and transformers scheme provide good matching for input, inter-stage and output at 26GHz band. Simulation results demonstrate the PA with of 15.6 dBm, of 13.3 dBm, and peak PAE of 24.44%. Its -3dB bandwidth covers 4GHz, with better than 10dB input/output return loss across band. It consumes 74mA from a 1.5V supply.

A 15.6 dBm P, 24 dB Gain, 24.4%PAE, Linear CMOS Power Amplifier for 5G Application

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A 15.6 dBm P, 24 dB Gain, 24.4%PAE, Linear CMOS Power Amplifier for 5G Application