An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Lithography is a field in which advances proceed at a swift pace. This book was written to address several needs, and the revisions for the second edition were made with those original objectives in mind. Many new topics have been included in this text commensurate with the progress that has taken place during the past few years, and several subjects are discussed in more detail. This book is intended to serve as an introduction to the science of microlithography for people who are unfamiliar with the subject. Topics directly related to the tools used to manufacture integrated circuits are addressed in depth, including such topics as overlay, the stages of exposure, tools, and light sources. This text also contains numerous references for students who want to investigate particular topics in more detail, and they provide the experienced lithographer with lists of references by topic as well. It is expected that the reader of this book will have a foundation in basic physics and chemistry. No topics will require knowledge of mathematics beyond elementary calculus.

Principles of Lithography

Metal silicides have played an indispensable role in the rapid developments of microelectronics since PtSi was first used to improve the rectifying characteristics of diodes in early 1960s. This wo ...

Metal silicides in CMOS technology : Past, present, and future trends

Systems and methods for producing thin film transistor structures useful in controlling electronic displays. Thin film transistors are fabricated using all-additive methods including printing techniques, soft lithography and material deposition methods. The thin film transistors can be deposited with the gate on the bottom or on the top of the structure. The deposition methods include the possibility of isolating nearly completely the transistor structure from the electronic display devices, so as to minimize or eliminate deleterious interactions therebetween.

Preferred methods for producing electrical circuit elements used to control an electronic display

A two-step formation process provides conformal coverage at both the bottom surface and one or more side walls of an opening for various applications, e.g., high aspect ratio contact liners or storage cell capacitor electrode applications, and provides conformal coverage on any features requiring such coverage. A method for forming a conformal layer in the fabrication of integrated circuits inlcudes providing a substrate assembly including at least a generally horizontal first surface and a second surface extending therefrom. A first portion of the layer is formed selectively on the horizontal first surface during a first period of time and a second portion of the layer is deposited selectively on the second surface during a second period of time. Further, one illustrative process for forming tungsten nitride in the fabrication of integrated circuits includes forming tungsten nitride on the horizontal first surface during a first period of time and depositing tungsten nitride on the second surface during a second period of time by plasma enhanced chemical vapor deposition. The tungsten nitride may be formed on the first surface by plasma enhanced chemical vapor deposition using a first reactant gas mixture including WF6, at least one of NF3 and N2, and H2 with the tungsten nitride being deposited on the second surface by plasma enhanced chemical vapor deposition using a second reactant gas mixture including WF6, at least one of NF3 and N2, H2, and He.

Multiple step methods for forming conformal layers

The present invention provides a structure and a method of manufacturing a resistor in a semiconductor device and especially for a resistor in an ink jet print head. The method begins by providing a substrate 10 having a field oxide region 20 surrounding an active area. The field oxide region 20 has an ink well region 52. Also a transistor is provided in the active area. The transistor comprises a source 12, drain 14 and gate electrode 16 18 19. A dielectric layer 24 is formed over the field oxide region 20 and the transistor 12 14 16 18. The dielectric layer 24 has contact openings over the source 12 and drain 14. A resistive layer 26 27 is formed over the dielectric layer 24 and contacting the source 12 and drain 14. The resistive layer 26 27 is preferably comprised of two layers of: a Titanium layer 26 under a titanium nitride 27 or a titanium layer 26 under a tungsten nitride layer 27. A first metal layer 28 is formed over the resistive layer. The metal layer 28 is patterned forming an first opening 29 over a portion of the resistive layer 28 over the ink well region 52. The resistive layer and first metal layer are patterned forming a second opening 31 over the gate electrode 16 18 and forming the resistive layer and first metal layer into an interconnect layer. A passivation layer 30 is then formed over the first metal layer 28, the resistive layer 26 27 in the ink well region 52, and the gate electrode 16 18.

Application of titanium nitride and tungsten nitride thin film resistor for thermal ink jet technology

A structure and method for making copper interconnections in an integrated circuit are described. The structure is a damascene copper connector whose upper surface is coplanar with the upper surface of the insulating layer in which it is embedded. Out-diffusion of copper from the connector is prevented by two barrier layers. One is located at the interface between the connector and the insulating layer ,while the second barrier is an insulating layer which covers the upper surface of the connector. The damascene process involves filling a trench in the surface of the insulator with copper and then removing the excess by chem.-mech. polishing. Since photoresist is never in direct contact with the copper the problem of copper oxidation during resist ashing has been effectively eliminated.

Method of manufacturing copper interconnect with top barrier layer

Ti/titanium nitride and ti/tungsten nitride thin film resistors for thermal ink jet technology

The invention describes three embodiments of methods for forming a balloon shaped STI trench. The first embodiment begins by forming a barrier layer over a substrate. An isolation opening is formed in the barrier layer. Next, ions are implanted into said substrate through said isolation opening to form a Si damaged or doped first region. The first region is selectively etching to form a hole. The hole is filled with an insulating material to form a balloon shaped shallow trench isolation (STI) region. The substrate has active areas between said balloon shaped shallow trench isolation (STI) regions. The second embodiment differs from the first embodiment by forming a trench in the substrate before the implant. The third embodiment forms a liner in the trench before an isotropic etch of the substrate through the trench.

Method to form a balloon shaped STI using a micro machining technique to remove heavily doped silicon

This article demonstrates that micro-Raman spectroscopy is a very powerful technique for the study of a variety of problems related to metal salicides for Si device fabrication In addition to its versatile nature and ease of use, this technique provides some unique capabilities that complement the commonly used tools for Si device characterization Phase identification of the TiSi2 C54, C49, and C40 phases as well as NiSi and NiSi2 can be achieved easily using Raman spectroscopy The phase transition process from NiSi to NiSi2 has also been successfully monitored Raman band assignments for C40 TiSi2 and NiSi are also made in order to have a better understanding of the Raman spectra Thickness measurement of ultrathin salicide films from 45 nm down to 6 nm has been accurately performed using attenuation of the Si Raman signal at 520 cm−1, and film uniformity can also be evaluated using the same peak Local orientations of the NiSi grains are studied by the relative intensity of the NiSi Raman peaks with micron spatial resolution, which provides complementary information to the space-averaged x-ray diffraction result

Applications of micro-Raman spectroscopy in salicide characterization for Si device fabrication

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