In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

A CMOS metal-electrode-based micro system for bidirectional communication (stimulation and recording) with neuronal cells in vitro is presented. The chip overcomes the interconnect challenge that limits today's bidirectional microelectrode arrays. The microsystem has been fabricated in an industrial CMOS technology with several post-CMOS processing steps to realize 128 biocompatible electrodes and to ensure chip stability in physiological saline. The system comprises all necessary control circuitry and on-chip A/D and D/A conversion. A modular design has been implemented, where individual stimulation- and signal-conditioning circuitry units are associated with each electrode. Stimulation signals with a resolution of 8 bits can be sent to any subset of electrodes at a rate of 60 kHz, while all electrodes of the chip are continuously sampled at a rate of 20 kHz. The circuitry at each electrode can be individually reset to its operating point in order to suppress artifacts evoked by the stimulation pulses. Biological measurements from cultured neuronal networks originating from dissociated cortical tissue of fertilized chicken eggs with amplitudes of up to 500 muVpp are presented

CMOS microelectrode array for bidirectional interaction with neuronal networks

Traditionally, most of the sensor interfaces must be tailored towards a specific application. This approach results in a high recurrent design cost and time to market. On the other hand, generic sensor interface design reduces the costs and offers a handy solution for multisensor applications. This paper presents a generic sensor interface chip (GSIC), which can read out a broad range of capacitive sensors. It contains capacitance-to-voltage converters, a switched-capacitor amplifier, an analog-to-digital converter, oscillators, clock generation circuits and a reference circuit. The system combines a very low-power design with a smart energy management, which adapts the current consumption according to the accuracy and speed requirements of the application. The GSIC is used in a pressure and an acceleration monitoring system. The pressure monitoring system achieves a current drain of 2.3 muA for a 10-Hz sample frequency and an 8-bit accuracy. In the acceleration monitoring system, we measured a current of 3.3 muA for a sample frequency of 10 Hz and an accuracy of 9 bits

Ultra-Low-Power Interface Chip for Autonomous Capacitive Sensor Systems

A monolithic potentiostat for chemical and biochemical sensors is presented. It allows measurements that use two- or three-clectrode-configurations in amperometric and voltammetric mode. The amplification part converts the electrode current with an input range from +/-0.1 InA up to +/-0.5/splmu/A. The microchip is fabricated in a 1/spl mu/m/5V Low Power Silicon-Gate CMOS process. The small chip size allows the assembly of the potentiostat together with monolithic microelectrodes on the same substrate. This way the distortion of the electrode signal is minimized, and the resulting rnicrosystem can be used as a low cost mass product for selective analysis, e.g. in very narrow passages.

Low-power Single-chip CMOS Potentiostat

A monolithic biosensing platform is presented for miniaturized amperometric electrochemical sensing in CMOS. The system consists of a fully integrated current readout circuit for differential current measurement as well as on-die sensors developed by growing platinum nanostructures (Pt-nanoS) on top of electrodes implemented with the top metal layer. The circuit is based on the switch–capacitor technique and includes pseudodifferential integrators for concurrent sampling of the differential sensor currents. The circuit further includes a differential to single converter and a programmable gain amplifier prior to an ADC. The system is fabricated in $\text{0.35}\ \mu \text{m}$ technology and measures current within $\pm \text{20}\ \mu \text{A}$ with minimum input-referred noise of $\text{0.47}\ \text{pA}$ and consumes $\text{9.3}\ \text{mW}$ from a $\text{3.3}\ \text{V}$ supply. Differential sensing for nanostructured sensors is proposed to build highly sensitive and offset-free sensors for metabolite detection. This is successfully tested for bio-nano-sensors for the measurement of glucose in submilli molar concentrations with the proposed readout IC. The on-die electrodes are nanostructured and cyclic voltammetry run successfully through the readout IC to demonstrate detection of $\text{H}_2\text{O}_2$ .

/pdf/a-differential-electrochemical-readout-asic-with-mzt0ofo3fw.pdf

A Differential Electrochemical Readout ASIC With Heterogeneous Integration of Bio-Nano Sensors for Amperometric Sensing

A monolithic realization of a switched-capacitor amplifier is reported. It has op-amp offset voltage cancellation without requiring the output to slew to ground each time the amplifier is reset. The amplifier is very insensitive to low op-amp gain. It also has clock-feedthrough cancellation. Finally, it can be used as a differential amplifier with both inputs being sampled at the same instance.

A differential switched-capacitor amplifier

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A differential switched-capacitor amplifier