An arbitration circuit 108 receives a read/write request from a master 101, such as a CPU, in which low latency is required, at a regular interval, such that the master 101 performs memory access with low latency. A remaining band which is not used by the master 101 is allocated to masters 102 and 103, such as a DMA controller, in which a wideband is required, thereby ensuring a necessary band. When a read/write request is retained in a buffer 119 of a slave 118, the arbitration circuit 108 suppresses the acceptance of the read/write requests from the masters 102 and 103 having low priority. Therefore, it is possible to provide a bus arbitration apparatus capable of transmitting a request from a specific master to a slave with low latency, and to ensure a band necessary for another master.

Bus arbitration apparatus

A clock supply method for supplying a clock to a plurality of processing units (13-1 to 13-4) includes supplying a clock from a first clock supply unit (12-1) to processing units (13-1, 13-2) forming a first group as a primary clock and to processing units (13-3, 13-4) forming a second group as a standby clock; supplying a clock from a second clock supply unit (12-2) including a clock source different from that of the first clock supply unit (12-1) to the processing units (13-3, 13-4) forming the second group as a primary clock and to the processing units (13-1, 13-2) forming the first group as a standby clock; and when a processing unit in the first or second group detects an abnormality of the primary clock, switching the standby clock into use in place of the primary clock being supplied to group to which the processing unit that has detected the abnormality belongs; wherein the first and second clock supply units (12-1, 12-2) supply clocks with the same frequency.

Clock supply method and information processing apparatus

Provided is a data storage drive for encrypting data, comprising a microprocessor and circuitry coupled to the microprocessor and adapted to receive a session encrypted data key and to decrypt the session encrypted data key using a session key, wherein a result is a data key that is capable of being used to encrypt clear text and to decrypt cipher text written to a storage medium. Also provided is a system, comprising a microprocessor and circuitry coupled to the microprocessor and adapted to receive a session encrypted data key and to decrypt the session encrypted data key using a private key, wherein a result is a secret key that is capable of being used to encrypt clear text and to decrypt cipher text written to a storage medium.

Key encryption and decryption

An example method is provided and includes providing an encrypted image to a central processing unit of an integrated circuit and decrypting the encrypted image using a cryptographic key element. The cryptographic key element is embedded within the integrated circuit. The method also includes evaluating the decrypted image in order to verify its authenticity, and executing the decrypted image if the decrypted image is successfully verified. In more particular embodiments, the verification includes utilizing an executable and linkable format (ELF) to signify that encryption has been enabled for at least a portion of the encrypted image. A processor within the integrated circuit can be provided with the cryptographic key element that corresponds to a product family of devices. The method can also include providing a corresponding image of the decrypted image to an external memory of the integrated circuit.

System and method for executing encrypted binaries in a cryptographic processor

A method, server and storage medium for verifying a transaction using a smart card are disclosed. A server receives a transaction request to perform a transaction with a user of the smart card. The transaction request includes identification information and encrypted data extracted from the smart card, and transaction information. The server determines a user account linked to the identification information. The server performs a first verification process to authenticate the smart card by verifying that the smart card possesses a correct decryption key corresponding to the identification information. The server performs a second verification process to authenticate the smart card by verifying that the encrypted data extracted from the smart card encodes stored data corresponding to the respective user account linked to the identification information. If the first and the second verification processes are successful, the server processes the transaction in accordance with the transaction information.

Method, Server, And Storage Medium For Verifying Transactions Using A Smart Card

A multiprocessor system includes a plurality of masters, at least one first type of slave operating with a first clock frequency, and at least one second type of slave operating with a second clock frequency higher than the first clock frequency. An arbitrator coordinates access between the masters and the slaves via a single read/write bus path between the arbitrator and the first type of slave, and via a plurality of read bus paths and/or a plurality of write bus paths between the arbitrator and the second type of slave.

Data transfer in multiprocessor system

An encrypted data player device is configured to process encrypted key and encrypted data received through a system bus. The encrypted data player device includes a device key storage circuit and a decryption circuit. The device key storage circuit is configured to store a device key. The decryption circuit is configured to receive the device key directly from the device key storage circuit, decode the encrypted key using the device key and decode the encrypted data using the decrypted key.

Encrypted data players and encrypted data player systems

A method and apparatus for decoding video, which alternately store lines of a picture in pixel units, and a method of storing a reference picture, n which the apparatus includes a memory that stores M lines of a picture in N interleave lines, wherein M is a natural number and N is a natural number smaller than M, and a decoder that decodes the picture by receiving the interleave lines, wherein pixel data of a part of the lines from among the M lines is alternately stored in each interleave line. Using the method and apparatus for decoding a video and the method of storing a reference picture, the decoding speed can be increased and latency during decoding of a video and a bandwidth can be decreased,

Method and apparatus for decoding video that alternately store lines of picture in pixel units and method of storing reference picture

Multi processor system and data transfer method thereof

A device and a system for playing encrypted data are provided to obtain a security of a data processor from external intrusion such as hacking by preventing an encrypted key from the outside access when the encrypted data is played. A device key storing circuit(225) stores a device key. A decryption circuit(226) directly receives the device key from the device key storing circuit, decrypts the encrypted key by using the device key, and decrypts the encrypted data by using the decrypted key. The encrypted key and data is received from the same storage medium such as a DVD(Digital Versatile Disk)(210). The device key storing circuit is not accessed from the outside through a system bus. An encrypted data player(220) is a DVD player.

Encrypted data player and encrypted data player system

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