An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

A low-noise amplifier, direct-conversion quadrature mixer, power amplifier, and voltage-controlled oscillators have been implemented in a 012-/spl mu/m, 200-GHz f/sub T/290-GHz f/sub MAX/ SiGe bipolar technology for operation at 60 GHz At 615 GHz, the two-stage LNA achieves 45-dB NF, 15-dB gain, consuming 6 mA from 18 V This is the first known demonstration of a silicon LNA at V-band The downconverter consists of a preamplifier, I/Q double-balanced mixers, a frequency tripler, and a quadrature generator, and is again the first known demonstration of silicon active mixers at V-band At 60 GHz, the downconverter gain is 186 dB and the NF is 133 dB, and the circuit consumes 55 mA from 27 V, while the output buffers consume an additional 52 mA The balanced class-AB PA provides 108-dB gain, +112-dBm 1-dB compression point, 43% maximum PAE, and 16-dBm saturated output power Finally, fully differential Colpitts VCOs have been implemented at 22 and 67 GHz The 67-GHz VCO has a phase noise better than -98 dBc/Hz at 1-MHz offset, and provides a 31% tuning range for 8-mA current consumption from a 3-V supply

SiGe bipolar transceiver circuits operating at 60 GHz

"Extreme environments" represents an important niche market for electronics and spans the operation of electronic components in surroundings lying outside the domain of conventional commercial, or even military, specifications. Such extreme environments would include, for instance, operation to very low temperatures (e.g., to 77 K or even 4.2 K), operation at very high temperatures (e.g., to 200/spl deg/C or even 300/spl deg/C), and operation in a radiation-rich environment (e.g., space). We argue that the unique bandgap-engineered features of silicon-germanium heterojunction bipolar transistors offer great potential to simultaneously satisfy all three extreme environment applications, potentially with little or no process modification, ultimately providing compelling cost advantages at the IC and system level.

On the Potential of SiGe HBTs for Extreme Environment Electronics

A semiconductor device includes capacitors connected in parallel. Electrode active portions and a discharge active portion are defined on a semiconductor substrate, and capping electrodes are disposed respectively on the electrode active portions. A capacitor-dielectric layer is disposed between each of the capping electrodes and each of the electrode active portions that overlap each other. A counter doped region is disposed in the discharge active portion. A lower interlayer dielectric covers the entire surface of the semiconductor substrate. Electrode contact plugs respectively contact the capping electrodes through the lower interlayer dielectric, and a discharge contact plug contacts the counter doped region through the lower interlayer dielectric. A lower interconnection is disposed on the lower interlayer dielectric and contacts the electrode contact plugs and the discharge contact plug.

Semiconductor devices and methods of fabricating the same

Silicon offers a new set of possibilities and challenges for RF, microwave, and millimeter-wave applications. While the high cutoff frequencies of the SiGe heterojunction bipolar transistors and the ever-shrinking feature sizes of MOSFETs hold a lot of promise, new design techniques need to be devised to deal with the realities of these technologies, such as low breakdown voltages, lossy substrates, low-Q passives, long interconnect parasitics, and high-frequency coupling issues. As an example of complete system integration in silicon, this paper presents the first fully integrated 24-GHz eight-element phased array receiver in 0.18-/spl mu/m silicon-germanium and the first fully integrated 24-GHz four-element phased array transmitter with integrated power amplifiers in 0.18-/spl mu/m CMOS. The transmitter and receiver are capable of beam forming and can be used for communication, ranging, positioning, and sensing applications.

/pdf/integrated-phased-array-systems-in-silicon-2i0prw8slb.pdf

Integrated Phased Array Systems in Silicon

A method for forming a transmission line structure for a semiconductor device includes forming an interlevel dielectric layer over a first metallization level, removing a portion of the interlevel dielectric layer and forming a sacrificial material within one or more voids created by the removal of the portion of the interlevel dielectric layer. A signal transmission line is formed in a second metallization level formed over the interlevel dielectric layer, the signal transmission line being disposed over the sacrificial material. A portion of dielectric material included within the second metallization level is removed so as to expose the sacrificial material, wherein a portion of the sacrificial material is exposed through a plurality of access holes formed through the signal transmission line. The sacrificial material is removed so as to create an air gap beneath the signal transmission line.

Method for forming suspended transmission line structures in back end of line processing

Millimeter-wave applications are gaining growing interest in recent times. To meet the challenges for such applications, SiGe HBTs, with simultaneously optimized f/sub T/ and f/sub max/ of >300 GHz, are developed. To the author's knowledge, this is the first report of f/sub T/ and f/sub max/ both exceeding 300 GHz for any Si-based transistor. BV/sub CEO/ and BV/sub CBO/ are 1.6 V and 5.5 V, respectively, with peak current gain of 660. Noise measurement shows F/sub min/ of 0.45 dB and 1.4 dB at 10 GHz and 25 GHz with associate gain of 14 dB and 8 dB, respectively. The results indicate SiGe HBTs are highly suitable for the rapidly expanding millimeter-wave applications.

SiGe HBTs for millimeter-wave applications with simultaneously optimized f/sub T/ and f/sub max/ of 300 GHz

SiGe HBTs for millimeter-wave applications with simultaneously optimized f T and f max of 300 GHz

The present invention provides a high-performance metal-insulator-metal (MIM) capacitor which contains a high-k dielectric, yet no substantial shorting of the MIM capacitor is observed. Specifically, shorting of the MIM capacitor is substantially prevented in the present invention by forming a passivation layer between the high-k dielectric layer and each of the capacitor's electrodes. The inventive MIM capacitor includes a first conductor; a first passivation layer located atop the first conductor; a high-k dielectric layer located atop the first passivation layer; a second passivation layer located atop the high k dielectric layer; and a second conductor located atop the second passivation layer.

PREVENTION OF Ta2O5 MIM CAP SHORTING IN THE BEOL ANNEAL CYCLES

A method is provided for fabricating a microelectronic chip which includes a passive device such, as an inductor, overlying an air gap. In such method, a plurality of front-end-of-line (“FEOL”) devices are formed in a semiconductor region of the microelectronic chip, and a plurality of stacked interlevel dielectric (“ILD”) layers are formed to overlie the plurality of FEOL devices, the plurality of stacked ILD layers including a first ILD layer and a second ILD layer, where the second ILD layer is resistant to attack by a first etchant which attacks the first ILD layer. A passive device is formed to overlie at least the first ILD layer. Using the first etchant, a portion of the first ILD layer in registration with the passive device is removed to form an air gap which underlies the passive device in registration with the passive device.

Air gap under on-chip passive device

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