K. Asano
1 Papers
K. Asano is an academic researcher. The author has contributed to research in topics: Conductivity & Stacking. The author has an hindex of 1, co-authored 1 publications.
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Papers
Conductivity Degradation of 4H-SiC Pin Diode with In-grown Stacking Faults
Abstract: The electrical characteristics of 4H-SiC p–i–n diodes with 8H-type in-grown stacking faults are investigated. The 4H-SiC p–i–n diodes have epilayers with a low Z1/2 center density formed by carbon implantation. The forward voltage drops of the 4H-SiC p–i–n diode with 8H-type in-grown stacking faults are larger than those of the 4H-SiC p–i–n diode without an 8H-type in-grown stacking fault. The differential on-resistance of the 4H-SiC p–i–n diode with 8H-type in-grown stacking faults is larger than the drift resistance of the drift layer calculated from the doping density and thickness of the drift layer. A large number of electrons are trapped at 8H-type in-grown stacking faults, and the effective carrier density decreases compared with the doping density.
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