This article presents a new transmitted reference UWB receiver, which utilizes the orthogonal property of even and odd order derivatives of Gaussian pulses in neighboring chips for synchronization. This system, referred to as orthogonal TR-UWB (OTR-UWB), employs only a single spreading code, which results in much lower mean detection time compared to DS-UWB systems. The hardware complexity for OTR-UWB receiver is significantly reduced against conventional TR-UWB systems. In addition, simulation results show that BER performance is improved, while the new system is capable of supporting higher data rates. Also, this article presents the FPGA implementation of OTR-UWB, with a bit-rate of 25Mb/s without using equalizer. In addition, we present the DSP algorithm of baseband. Hardware of this system is implemented on two different FPGAs from ALTERA and XILINX, CycloneII (EP2C35F672C6) and Spartan 3 (3s4000fg676-5). Gate estimation and power analysis are performed by Quartus II 7.2 (ALTERA) and ISE 8.1 (XILINX) softwares.

Performance and Complexity Evaluation of OTR-UWB Receiver

Synchronization performance of a pulse-based ultra- wideband (UWB) system is investigated by taking into account of distortions caused by transmitter and receiver antennas and wireless propagation channels in difierent environments. The synchronization scheme under consideration can be achieved in two steps: a slide correlator and a phase-locked loop (PLL)-like flne tuning loop. Efiects of the non-idealities are evaluated by analyzing the distortion of the received UWB pulse and subsequently the synchronization performance of the pulse-based UWB system. It is found that generally a smaller step is required for the sliding correlator due to distortions introduced by the antennas and channels. However, the flne tuning loop can always be stabilized by adjusting the loop parameters. Therefore, synchronization can always be achieved.

/pdf/effects-of-antennas-and-propagation-channels-on-12xxjfnt7f.pdf

Effects of Antennas and Propagation Channels on Synchronization Performance of a Pulse-Based Ultra-Wideband Radio System

Ultra-wide band (UWB) communication shows great potential for low-power communication for wireless sensor or body area network (BAN) applications. In particular, noncoherent receivers can be implemented with very low complexity. However, impulse radio and low duty cycle signaling involve stringent requirements on timing recovery. Standard synchronization algorithms might not be applicable due to constraints on memory capacity, clock accuracy and the sampling frequency of the receiver. Therefore, we present a scheme for burst detection and joint frame and symbol synchronization where both transmitter and receiver respect the low-duty cycle requirements. Furthermore, a subsampling analog-to-digital converter with a free running clock is assumed to meet low-power constraints. Burst detection is based on correlation with a known synchronization sequence. For symbol synchronization digital reconstruction of the symbol timing is applied, based on an FIR interpolation filter. Finally, it can be seen from performance results with real measured BAN channels that the presented synchronization algorithm is very well suited for the use in such applications.

/pdf/synchronization-scheme-for-low-duty-cycle-uwb-impulse-radio-2u7yi7ir3f.pdf

Synchronization scheme for low duty cycle UWB impulse radio receiver

This paper presents a new transmitted reference ultra-wideband receiver, which utilizes the orthogonal property of even and odd order derivatives of Gaussian pulses in neighboring chips for synchronization. This system, referred to as orthogonal TR-UWB (OTR-UWB), employs only a single spreading code, which results in much lower mean detection time compared to DS-UWB systems since smaller search space is involved for coarse acquisition. The hardware complexity for OTR-UWB receiver is significantly reduced against conventional TR-UWB systems. In addition, simulation results show that bit error rate (BER) performance is improved, while the new system is capable of supporting higher data rates. Also, this paper presents a technique for implementing low rate OTR-UWB system in FPGA by combining pipeline scheduling, parallel component, and module selection. The system has been implemented on two FPGA platforms from ALTERA and XILINX, CycloneII (EP2C35F672C6) and Spartan 3 (3s4000fg676-5)with a bit-rate of 25Mb/s without using equalizer. It incorporates 4-bit of resolution with 8GHz frequency sampling rate for analog to digital conversion realized by parallel low frequencyADC blocks. Gate estimation and power analysis are performed by Quartus II 7.1 (ALTERA) and ISE 8.1 (XILINX) softwares.

Baseband implementation of OTR-UWB receiver using FPGA

In this paper, a novel ultrawideband system for multiuser data communications is proposed. In this system multiple users are allowed to transmit on-off keying modulated signals in the same time intervals and exploiting the same frequency subband. Time/frequency overlapped data frames sent by distinct users include low data rate training sequences characterized by different repetition periods. This transmission strategy, known as rate division multiple access in the technical literature, allows to ease two fundamental tasks at the receive side, namely joint channel estimation and timing synchronization. Channel estimates are exploited by a multiuser detector based on a zero forcing equalizer. Numerical results evidence that the proposed solution yields good error performance at the price of a limited complexity.

A Novel Ultrawideband System for Multiuser Data Communications

Ultra-Wide band (UWB) radio, transmits data using nanosecond level impulses, is gaining increasing attention own to its attractive features that include low-complexity hardware and high transmission rate. However, UWB system has to cope with great design challenges, including synchronization, multi-path energy combining. A review of acquisition methods in direct sequence-spread spectrum (DS-SS) communication system is given in detail at first and analysis of their performance with evaluating parameters, which is the essential reference to DS-SS acquisition algorithm is shown next. Then, several acquisition scheme used specially in DS-UWB system is analyzed. Hardware complexity and acquisition performance in DS-UWB is still the two sides of one contradiction needed to be tradeoff.

The overview of synchronization in DS-UWB

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The overview of synchronization in DS-UWB