Energy production and storage technologies have attracted a great deal of attention for day-to-day applications. In recent decades, advances in lithium-ion battery (LIB) technology have improved living conditions around the globe. LIBs are used in most mobile electronic devices as well as in zero-emission electronic vehicles. However, there are increasing concerns regarding load leveling of renewable energy sources and the smart grid as well as the sustainability of lithium sources due to their limited availability and consequent expected price increase. Therefore, whether LIBs alone can satisfy the rising demand for small- and/or mid-to-large-format energy storage applications remains unclear. To mitigate these issues, recent research has focused on alternative energy storage systems. Sodium-ion batteries (SIBs) are considered as the best candidate power sources because sodium is widely available and exhibits similar chemistry to that of LIBs; therefore, SIBs are promising next-generation alternatives. Recently, sodiated layer transition metal oxides, phosphates and organic compounds have been introduced as cathode materials for SIBs. Simultaneously, recent developments have been facilitated by the use of select carbonaceous materials, transition metal oxides (or sulfides), and intermetallic and organic compounds as anodes for SIBs. Apart from electrode materials, suitable electrolytes, additives, and binders are equally important for the development of practical SIBs. Despite developments in electrode materials and other components, there remain several challenges, including cell design and electrode balancing, in the application of sodium ion cells. In this article, we summarize and discuss current research on materials and propose future directions for SIBs. This will provide important insights into scientific and practical issues in the development of SIBs.

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Sodium-ion batteries: present and future

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Provided are a thin film transistor (TFT) including a selectively crystallized channel layer, and a method of manufacturing the TFT. The TFT includes a gate, the channel layer, a source, and a drain. The channel layer is formed of an oxide semiconductor, and at least a portion of the channel layer contacting the source and the drain is crystallized. In the method of manufacturing the TFT, the channel layer is formed of an oxide semiconductor, and a metal component is injected into the channel layer so as to crystallize at least a portion of the channel layer contacting the source and the drain. The metal component can be injected into the channel layer by depositing and heat-treating a metal layer or by ion-implantation.

Thin film transistor including selectively crystallized channel layer and method of manufacturing the thin film transistor

A method for fabricating a device using an oxide semiconductor, including a process of forming the oxide semiconductor on a substrate and a process of changing the conductivity of the oxide semiconductor by irradiating a predetermined region thereof with an energy ray.

Method of fabricating oxide semiconductor device

Sodium-ion batteries (SIBs) have been considered as the most promising candidate for large-scale energy storage system owing to the economic efficiency resulting from abundant sodium resources, superior safety, and similar chemical properties to the commercial lithium-ion battery Despite the long period of academic research, how to realize sodium-ion battery commercialization for market applications is still a great challenge Thus, from the perspective of future practical application, this review will identify the factors that are restricting commercialization, and evaluate the existing active materials and sodium-ion-based full-cell system The design and development trends that are needed for SIBs to meet the requirements of practical applications in large-scale energy storage will also be discussed in detail

Sodium-Ion Batteries: From Academic Research to Practical Commercialization

Disclosing is a strained silicon finFET device having a strained silicon fin channel in a double gate finFET structure. The disclosed finFET device is a double gate MOSFET consisting of a silicon fin channel controlled by a self-aligned double gate for suppressing short channel effect and enhancing drive current. The silicon fin channel of the disclosed finFET device is a strained silicon fin channel, comprising a strained silicon layer deposited on a seed fin having different lattice constant, for example, a silicon layer deposited on a silicon germanium seed fin, or a carbon doped silicon layer deposited on a silicon seed fin. The lattice mismatch between the silicon layer and the seed fin generates the strained silicon fin channel in the disclosed finFET device to improve hole and electron mobility enhancement, in addition to short channel effect reduction characteristic inherently in a finFET device.

Strained silicon finFET device

A method of forming a SiGe layer having a relatively high germanium content and a relatively low threading dislocation density includes preparing a silicon substrate; depositing a layer of SiGe to a thickness of between about 100 nm to 500 nm, wherein the germanium content of the SiGe layer is greater than 20%, by atomic ratio; implanting H+ ions into the SiGe layer at a dose of between about 1·10 16 cm −2 to 5·10 16 cm −2 , at an energy of between about 20 keV to 45 keV; patterning the SiGe layer with photoresist; plasma etching the structure to form trenches about regions; removing the photoresist; and thermal annealing the substrate and SiGe layer, to relax the SiGe layer, in an inert atmosphere at a temperature of between about 650° C. to 950° C. for between about 30 seconds and 30 minutes.

Method to form thick relaxed SiGe Layer with trench structure

A method of fabricating vertical sidewalls on silicon (110) substrates for use in Si/SiGe photodetectors includes preparing a silicon (110) layer wherein the silicon (110) plane is parallel to an underlying silicon wafer surface Masking the silicon (110) layer with mask sidewalls parallel to a silicon (111) layer plane and etching the silicon (110) layer to remove an un-masked portion thereof, leaving a patterned silicon (110) layer having vertical silicon (111) sidewalls Removing the mask; growing SiGe-containing layers on the patterned silicon (110) layer; and fabricating a photodetector

Fabrication of vertical sidewalls on (110) silicon substrates for use in Si/SiGe photodetectors

Strained silicon fin structure

The present invention discloses a novel transistor structure employing semiconductive metal oxide as the transistor conductive channel. By replacing the silicon conductive channel with a semiconductive metal oxide channel, the transistors can achieve simpler fabrication process and could realize 3D structure to increase circuit density. The disclosed semiconductive metal oxide transistor can have great potential in ferroelectric non volatile memory device with the further advantages of good interfacial properties with the ferroelectric materials, possible lattice matching with the ferroelectric layer, reducing or eliminating the oxygen diffusion problem to improve the reliability of the ferroelectric memory transistor. The semiconductive metal oxide film is preferably a metal oxide exhibiting semiconducting properties at the transistor operating conditions, for example, In2O3 or RuO2. The present invention ferroelectric transistor can be a metal-ferroelectric-semiconductive metal oxide FET having a gate stack of a top metal electrode disposed on a ferroelectric layer disposed on a semiconductive metal oxide channel on a substrate. Using additional layer of bottom electrode and gate dielectric, the present invention ferroelectric transistor can also be a metal-ferroelectric-metal (optional)-gate dielectric (optional)-semiconductive metal oxide FET.

Semiconductive metal oxide thin film ferroelectric memory transistor

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