China’s Battery Electric Vehicles Lead the World: Achievements in Technology System Architecture and Technological Breakthroughs

Compared with silicon-based Insulated Gate Bipolar Transistors (IGBTs), silicon carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) are characterized by higher operating temperatures, switching speeds and switching frequencies, and are considered the next evolutionary step for future electric drives. The application of SiC MOSFETs in the field of electrified vehicles has brought many benefits, such as higher efficiency, higher power density, and simplified cooling system, and can be seen as an enabler for high-power fast battery charging. This article reviews the benefits of SiC MOSFETs in different electrified vehicle (EV) application scenarios, including traction inverters, on-board converters, and off-board charging applications. However, replacing Si-IGBTs with SiC MOSFETs introduces several new technical challenges, such as stronger electromagnetic interference (EMI), reliability issues, potential electric machine insulation failure due to high transient voltages, and cooling difficulties. Compared to mature silicon-based semiconductor technologies, these challenges have so far hindered the widespread adoption of SiC MOSFETs in automotive applications. To fully exploit the advantages of SiC MOSFETs in automotive applications and enhance their reliability, this paper explores future technology developments in SiC MOSFET module packaging and driver design, as well as novel electric machine drive strategies with higher switching frequencies, and optimized high-frequency machine design. 

https://onlinelibrary.wiley.com/doi/pdfdirect/10.1049/pel2.12524

A review of silicon carbide MOSFETs in electrified vehicles: Application, challenges, and future development

Power semiconductor devices are often connected in parallel to increase the current rating of the power conversion systems. However, due to mismatched circuit parameters or semiconductor fabrication discrepancies, the current of paralleled power semiconductor devices can be unbalanced, which potentially leads to accelerated aging and long-term reliability issues. The fast-switching speed of silicon carbide (SiC) devices aggravates this problem due to its higher sensitivity to parasitic parameters. Numerous efforts have been dedicated to analyzing and addressing the current imbalance issue of paralleling SiC devices. This article comprehensively summarizes and presents state-of-the-art research regarding the current imbalance in paralleled SiC devices. Degree of imbalance is proposed to comprehensively quantify the current mismatch. Starting with mechanism analysis, different types of current imbalance are categorized. Various device parameters and the package layout that impact the current distribution are investigated. The existing solutions including passive methods and active methods are concluded and categorized. This work also incorporates insight into the future development needs of high-power multichip SiC module packaging and driving technologies. 

/pdf/parallel-connection-of-silicon-carbide-mosfets-challenges-2mcqntli.pdf

Parallel Connection of Silicon Carbide MOSFETs—Challenges, Mechanism, and Solutions

In high-power applications, parallel connection of discrete silicon carbide (SiC) <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet s is necessary to increase the current rating. However, the unbalanced dynamic current during switching transient may cause unequal power loss and thermal distribution, which is a great challenge in parallel applications. In this article, a dynamic current balancing method based on a new active gate driver (AGD) is proposed to improve the current sharing. The principle of the AGD is based on <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">di/dt feedback control and voltage controlled current source to adjust gate drive current of SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet s. Therefore, the switching trajectory of the paralleled devices can be changed to achieve current balance. In addition, by using master-slave control strategy, the proposed AGD can be easily used for multiple paralleled devices. The double pulse tests are conducted to verify the effectiveness of the proposed AGD. For two paralleled devices, the turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on and turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off switching energy imbalances are reduced from 13.4% and 56.0% (12.1% and 52.9%) to 8.8% and 15.3% (8.0% and 8.8%) by the current source (current sink) circuit. For six paralleled devices, the degrees of turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on and turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off switching energy imbalances can be reduced from 21.8% and 16.1% to 11.8% and 7.8% by the proposed AGD.

Active Gate Driver for Dynamic Current Balancing of Parallel-Connected SiC MOSFETs

Due to the power limitation of single chip SiC MOSFET, the parallel operation of silicon carbide (SiC) MOSFETs is necessary for high power applications. However, the unbalanced current will cause potential safety and reliability risk. This paper proposes a new active gate drive (AGD) circuit to solve the dynamic unbalanced current problem. Compared with the existing current sharing scheme, this method can adjust the dynamic current distribution in real time and improve the dynamic current sharing among the devices. The experimental results verify the effectiveness of the proposed AGD.

An Active Gate Driver for Dynamic Current Sharing of Paralleled SiC MOSFETs

Discrete silicon carbide (SiC) mosfet s are usually connected in parallel to increase their current carrying capacity. However, unequal switching losses and unequal transient current overshoot can limit the maximum switching frequency and maximum current carrying capacity of the paralleled unit. In this article, a paralleled half-bridge unit is proposed to improve the transient current sharing performance, which is characterized by a distributed arrangement of dc capacitors. First, the main causes of the transient current imbalance in traditional power layout are analyzed theoretically for the first time. Then, the traditional power layout is optimized by the ANSYSEM cosimulation techniques to improve the transient current sharing performance. The layout of the gate driver is also optimized to reduce the transmission delay of the gate drive signal. The double pulse tests are carried out to verify the current sharing performance under normal and short-circuit operating conditions. Compared with traditional power layout, the difference in a transient current overshoot of the low-side paralleled SiC mosfet s is decreased significantly from 10.22% to 2.78% and the difference in switching losses is also reduced. A boost converter is constructed based on the paralleled half-bridge unit. A more uniform temperature distribution indicates the improved current sharing performance by optimizing the power layout.

Design of a Paralleled SiC MOSFET Half-Bridge Unit With Distributed Arrangement of DC Capacitors

One of the main obstacles to the robust optimization for permanent magnet machines is the high computational burden, which is mainly caused by the robustness evaluation process considering the manufacturing uncertainties. In this paper, a sequential sampling Kriging model is adopted to estimate the design robustness, and the problem of high-dimensional variables for the surrogate model due to uncertainties is avoided through adopting the worst-case based approach. To further reduce the number of finite element analyses (FEA) required for constructing a metamodel, a multi-points sequential sampling process with a two-step optimization oriented surrogate model updating algorithm is proposed. Compared with the FEA directly based robust optimization in previous work, similar Pareto Fronts are achieved by adopting the meta-model proposed algorithm but the overall run time reduced by 75%. In the end, an optimization problem for a 1.2 kW motor is considered by applying the proposed algorithm, and two prototypes with deliberately designed tolerances, imitating the worst-case scenarios in the real world, are manufactured. The worst-case torque ripple is reduced from 7.6% to 4.8% after optimizing, and this verifies the efficacy of the proposed algorithm.

A Computationally Efficient Surrogate Model Based Robust Optimization for Permanent Magnet Synchronous Machines

This paper investigates the conducted electromagnetic interference (EMI) characteristics of an on-board multiplexing converter that utilizes paralleled silicon carbide (SiC) devices to achieve high efficiency and high-power density for the application in electric vehicles (EVs) and plug-in hybrid electric vehicles (PHEVs). The multiplexing converter can operate as a three-phase interleaved DC/DC converter with a peak output power of 60 kW or an integrated two-stage non-isolated on-board charger (OBC) with an output power of 6.6 kW. The novelty of this paper is that it reveals that in the DC/DC mode the series resonance between the input negative lead parasitic inductance and the high frequency transmission line effects of the input power inductor will increase the conducted EMI levels, which can be mitigated by optimizing the winding methods of the power inductor or by adding a small capacitor, and reveals that in the non-isolated OBC mode the shielded cable on the battery-side will increase the grid-side EMI in the low frequency ranges, which can be suppressed by integrated installation of EMI filters without affecting the system power density. Firstly, parasitic parameters of the components of the multiplexing converter, such as the power inductors, the SiC MOSFETs and the shielded cables, are extracted and validated with impedance measurements, and the corresponding equivalent circuit models are established. Then, the conducted EMI simulation models of the multiplexing converter in different working modes are established. The influence of different interference sources and different parasitic parameters on the system EMI characteristics are analyzed, and the effective EMI suppression measures are given without affecting the system power density. Finally, the conducted EMI characteristics of the multiplexing converter and the effectiveness of the proposed EMI suppression measures are tested and verified through experiments.

/pdf/conducted-emi-investigation-of-a-sic-based-multiplexing-nyn06t8rzu.pdf

Conducted EMI Investigation of a SiC-Based Multiplexing Converter for EV/PHEV

This paper discusses the design of an on-board multiplexing converter that utilizes silicon carbide (SiC) devices to achieve high efficiency and high density for the application in electric vehicles (EVs) and plug-in hybrid electric vehicles (PHEVs). The converter can operate as a three-phase interleaved bidirectional dc-dc converter with a peak output power of 60 kW or an integrated two-stage on-board battery charger (OBC) with a peak output power of 6.6 kW. Firstly, a paralleled half-bridge unit consisting of eight discrete SiC MOSFETs is designed to increase the current capability. Secondly, a 15 kW/L 60 kW mutiplexing converter prototype is built based on the proposed paralleled unit. Experimental measurements demonstrate that the efficiency is 99.09% at 45 kW and 400 V to 750 V synchronous boost operation with a switching frequency of 50 kHz.

An All-SiC 15 kW/L 60 kW Multiplexing Converter for Electric Vehicles

Torque ripple reduction for interior permanent magnet synchronous machine (IPMSM) drives has been widely discussed for high-performance applications, since the performance of torque and speed will be degraded by torque ripples. Torque ripples can be dramatically reduced by injecting harmonic currents with properly designed magnitude and phase, which can generate extra torque ripples to compensate for the original ripples. However, the injected harmonic currents will generate extra machine loss, including both conduction copper loss and iron loss. In order to further reduce the machine loss when reducing torque ripples by injecting harmonic currents, it is meaningful to take into account both conduction copper loss and iron loss by the injected harmonic currents. The main contribution of this paper is to present a torque ripple reduction method for IPMSM drives with minimal machine loss, based on the torque ripple model and the extended harmonic iron loss model of IPMSM. And harmonic currents are optimized to minimize both torque ripples and the machine loss by harmonic currents. Experimental results demonstrate the effectiveness of the proposed method in torque ripple reduction. Also, compared with the existing methods, as iron loss by the injected harmonic currents is considered in harmonic current optimization, the proposed method can further reduce machine loss.

Torque Ripple Reduction Method for Interior Permanent Magnet Synchronous Machine Drives with Minimal Loss

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