Form of Control Expression % Abstract Form of Control Expression % others 32.4 ! function-call 3.8 object 15.5 object < integer-constant 2.2 object == object 8.9 object > integer-constant 1.8 ! object 7.4 function-call == object 1.6 function-call 7.4 object > object 1.4 expression 5.7 object != integer-constant 1.3 object != object 4.2 function-call == integer-constant 1.2 object == integer-constant 4.0 object < object 1.1 January 30, 2008 v 1.1 15 6.8.4 Selection statements 1740 selection-statements Fu nc tio n de fin iti on s 1 10 100 1,000 10,000 0 25 50 75 100 × × if • • else switch × × ××××××××××××××××××××××××××××××× ×××××× × ××× × ××××× ×× ×××× × ×× × × × × × × ××× × × ××× ×× × ××× × × × ××× × ×

The New C Standard (Excerpted material) An Economic and Cultural Commentary

This paper introduces Tiramisu, a polyhedral framework designed to generate high performance code for multiple platforms including multicores, GPUs, and distributed machines. Tiramisu introduces a scheduling language with novel extensions to explicitly manage the complexities that arise when targeting these systems. The framework is designed for the areas of image processing, stencils, linear algebra and deep learning. Tiramisu has two main features: it relies on a flexible representation based on the polyhedral model and it has a rich scheduling language allowing fine-grained control of optimizations. Tiramisu uses a four-level intermediate representation that allows full separation between the algorithms, loop transformations, data layouts, and communication. This separation simplifies targeting multiple hardware architectures with the same algorithm. We evaluate Tiramisu by writing a set of image processing, deep learning, and linear algebra benchmarks and compare them with state-of-the-art compilers and hand-tuned libraries. We show that Tiramisu matches or outperforms existing compilers and libraries on different hardware architectures, including multicore CPUs, GPUs, and distributed machines.

Tiramisu: A Polyhedral Compiler for Expressing Fast and Portable Code

Edge Effects of Call Edges In analogy to the concrete semantics we define, as a first step, for each complete lattice D, for monotonic edge effects [[k]] , and for monotonic functions enter and combine the abstract transformation effected by a same-level computation: [[π k]] = [[k]] ◦ [[π ]] for a normal edge k [[π1 〈f〉π2 〈/f〉]] = H ([[π2]] ) ◦ [[π1]] for a procedure f where the transformation

Compiler Design

Many important applications, such as those using sparse data structures, have memory reference patterns that are unknown at compile-time. Prior work has developed run-time reorderings of data and computation that enhance locality in such applications.This paper presents a compile-time framework that allows the explicit composition of run-time data and iteration-reordering transformations. Our framework builds on the iteration-reordering framework of Kelly and Pugh to represent the effects of a given composition. To motivate our extension, we show that new compositions of run-time reordering transformations can result in better performance on three benchmarks.We show how to express a number of run-time data and iteration-reordering transformations that focus on improving data locality. We also describe the space of possible run-time reordering transformations and how existing transformations fit within it. Since sparse tiling techniques are included in our framework, they become more generally applicable, both to a larger class of applications, and in their composition with other reordering transformations. Finally, within the presented framework data need be remapped only once at runtime for a given composition thus exhibiting one example of overhead reductions the framework can express.

/pdf/compile-time-composition-of-run-time-data-and-iteration-1oity67bce.pdf

Compile-time composition of run-time data and iteration reorderings

We investigate the problem of memory reuse, for reducing the necessary memory size, in the context of compilation of dedicated processors. Memory reuse is a well-known concept when allocating registers (i.e., scalar variables). Its (recent) extension to arrays was studied mainly by Lefebvre and Feautrier (for loop parallelization) and by Quillere and Rajopadhye (for circuit synthesis based on recurrence equations). Both consider affine mappings of indices to data, with modulo expressions in the first and (mainly) projections in the second. We develop a mathematical framework based on (integral) critical lattices that subsumes all previous approaches and gives new insights into the problem. Our technique consists first in building an abstract representation of conflicting indices (equivalent in a multi-dimensional space to the interference graph for register allocation), then in defining an integral lattice, admissible for the set of differences of conflicting indices, used to build a valid modular allocation. We also show the link with critical lattices, successive minima, and basis reduction, and we analyze various strategies for lattice-based memory allocation.

/pdf/lattice-based-memory-allocation-4okqcvh4l2.pdf

Lattice-based memory allocation

We present a unified mathematical framework for analyzing the tradeoffs between parallelism and storage allocation within a parallelizing compiler. Using this framework, we show how to find a good storage mapping for a given schedule, a good schedule for a given storage mapping, and a good storage mapping that is valid for all legal schedules. We consider storage mappings that collapse one dimension of a multi-dimensional array, and programs that are in a single assignment form with a one-dimensional schedule. Our technique combines affine scheduling techniques with occupancy vector analysis and incorporates general affine dependences across statements and loop nests. We formulate the constraints imposed by the data dependences and storage mappings as a set of linear inequalities, and apply numerical programming techniques to efficiently solve for the shortest occupancy vector. We consider our method to be a first step towards automating a procedure that finds the optimal tradeoff between parallelism and storage space.

/pdf/a-unified-framework-for-schedule-and-storage-optimization-13yc25z2l2.pdf

A unified framework for schedule and storage optimization

Integer division, modulo, and remainder operations are expressive and useful operations. They are logical candidates to express complex data accesses such as the wrap-around behavior in queues using ring buffers. In addition, they appear frequently in address computations as a result of compiler optimizations that improve data locality, perform data distribution, or enable parallelization. Experienced application programmers, however, avoid them because they are slow. Furthermore, while advances in both hardware and software have improved the performance of many parts of a program, few are applicable to division and modulo operations. This trend makes these operations increasingly detrimental to program performance.

This paper describes a suite of optimizations for eliminating division, modulo, and remainder operations from programs. These techniques are analogous to strength reduction techniques used for multiplications. In addition to some algebraic simplifications, we present a set of optimization techniques that eliminates division and modulo operations that are functions of loop induction variables and loop constants. The optimizations rely on algebra, integer programming, and loop transformations.

http://groups.csail.mit.edu/commit/papers/99/mdopt-TM.pdf

Strength reduction of integer division and modulo operations

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A unified framework for schedule and storage optimization

Strength reduction of integer division and modulo operations