Doped HfO2-based ferroelectric field-effect transistor (FeFET) is being actively explored as an emerging nonvolatile memory device with the potential for in-memory computing. In this work, we identify a new challenge of ferroelectric partial switching, namely “history effect” in minor loop dynamics. We develop a testing protocol to experimentally measure different transition paths in both ferroelectric capacitors (FeCap) and 28-nm high- ${k}$ metal-gate (HKMG) FeFET in Part I. The measurement results suggest that the intermediate states programming condition depends on the prior states that the device has gone through, and the condition may vary even when the transition occurs between the same starting and ending states. In Part II, a physics-based phase-field multidomain switching model is used to understand the origin of the history effect.

Investigating Ferroelectric Minor Loop Dynamics and History Effect—Part I: Device Characterization

Ferroelectric device based doped Hf0 2 is an emerging non-volatile memory that is able to store multilevel weights of the deep neural network (DNN) models and enables the compute-in-memory paradigm. In this invited paper, we will present our recent progresses in ferroelectric transistor (FeFET) design for inference as well as in-situ training. Physical insights of the history effect in the intermediate state programming are presented. System-level performance of using FeFET for inference is benchmarked against with SRAM and other emerging non-volatile memories at 32nm and 7nm, showing its significant benefits in throughput and energy efficiency.

Ferroelectric Transistors for Synaptic Devices: Challenges and Prospects

In-memory computing with emerging non-volatile memories (NVMs) can accelerate the deep neural networks (DNNs) by parallelizing vector-matrix multiplication (VMM) operations in the analog domain. Hafnium Zirconium Oxide (HZO) based ferroelectric field-effect transistor (FeFET) shows great promise as a synaptic device for neuromorphic computing. The FeFET channel conductance could be tuned to map the weights in the neural network. DNNs’ weight update rules require that the weight of each synapse can be increased and decreased with multilevel states, which can be realized by applying positive or negative voltage pulses to change the polarization states of the HZO material. Therefore, HZO is expected to work on the minor loop instead of only working on the saturation loop of the ploarizion-voltage (P-V) hysteresis loop. To investigate the minor loop and partial switching dynamics, a TiN/HZO (10 nm, Hf:Zr=1:1)/TiN capacitor structure was fabricated by atomic layer deposition (ALD) with post-annealing. We established a testing protocol to measure the real-time polarization response corresponding to the voltage sequence applied. The results show that the polarity change increases by increasing the pulse amplitude and pulse width. Therefore, tuning the gate pulse amplitude and width could achieve multi-states of FeFET channel conductance.

Investigating Dynamic Minor Loop of Ferroelectric Capacitor

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Investigating Dynamic Minor Loop of Ferroelectric Capacitor