A semiconductor structure includes a three dimensional stack including a first semiconductor die and a second semiconductor die. The second semiconductor die is connected with the first semiconductor die with a bump between the first semiconductor die and the second semiconductor die. The semiconductor structure includes a molding compound between the first semiconductor die and the second semiconductor die. A first portion of a metal structure over a surface of the three dimensional stack and contacting a backside of the second semiconductor die and a second portion of the metal structure over the surface of the three dimensional stack and configured for electrically connecting the three dimensional stack with an external electronic device.

Semiconductor structure and manufacturing method thereof

The composition for etching is a high-selectivity composition that can selectively remove a nitride film while minimizing the etch rate of an oxide film, and which does not have problems such as particle generation, which adversely affect the device characteristics.

Composition for etching and manufacturing method of semiconductor device using the same

The disclosure is related to a composition for etching, a method for manufacturing the composition, and a method for fabricating a semiconductor using the same. The composition may include a first inorganic acid, at least one of silane inorganic acid salts produced by reaction between a second inorganic acid and a silane compound, and a solvent. The second inorganic acid may be at least one selected from the group consisting of a sulfuric acid, a fuming sulfuric acid, a nitric acid, a phosphoric acid, and a combination thereof.

Composition for etching

A method of fabricating an integrated circuit device includes forming a structure on a substrate, the structure having a surface on which an oxide film and a nitride film are exposed; and selectively removing the nitride film from the oxide film and the nitride film by bringing the etchant composition into contact with the structure.

Etchant composition and method of fabricating integrated circuit device using the same

Three-dimensional NAND flash memory featuring dozens of vertically stacked memory cells is the state-of-the-art technology for most storage platforms. To fabricate three-dimensional (3D) NAND memory, lateral etching of the Si₃N₄ layer over SiO₂ is an essential step that is conducted through a wet etching process using a phosphoric acid-based etchant. Silyl-phosphate or highly selective nitride serves as an etching solution additive to control the SiO₂ layer dissolution rate. However, silyl-phosphate is prepared with an expensive monomeric silica precursor and at high reaction temperatures and generates environmentally harmful byproduct gases, such as HCl, HF, and CH₃OH. This study demonstrates that silyl-phosphate can be prepared using low-cost polymeric silica under a mild reaction temperature by changing the characteristic acidity of phosphoric acid. The possibility of tuning the phosphoric acid acidity was first studied by molecular dynamics simulations, and phosphoric acids with stronger acidity were prepared by the evaporation of water from H₃PO₄ (85%). The concentrated phosphoric acid enabled a fast reaction of polymeric silica and phosphate at a low reaction temperature (80 °C). The obtained silyl-phosphate lowered the SiO₂ layer dissolution rate, thereby yielding a Si₃N₄/SiO₂ layer etching ratio of up to 940. The proposed method offers an environmentally friendly production process for special chemicals used in 3D NAND flash memory fabrication.

Green Manufacturing of Silyl-Phosphate for Use in 3D NAND Flash Memory Fabrication

The present invention provides an etching composition, comprising a silyl phosphate compound, phosphoric acid and deionized water, and a method for fabricating a semiconductor, which includes an etching process employing the etching composition. The etching composition of the invention shows a high etching selectivity for a nitride film with respect to an oxide film. Thus, when the etching composition of the present invention is used to remove a nitride film, the effective field oxide height (EEH) may be easily controlled by controlling the etch rate of the oxide film. In addition, the deterioration in electrical characteristics caused by damage to an oxide film or etching of the oxide film may be prevented, and particle generation may be prevented, thereby ensuring the stability and reliability of the etching process.

Etching composition and method for fabricating semiconductor device using the same

Composition for etching and method for manufacturing semiconductor device using the same

The present invention relates to an etching composition, and a method for producing a semiconductor element comprising an etching process that utilizes the etching composition, the etching composition comprising a first inorganic acid, a first additive, and a solvent. The etching composition can minimize the etching rate of oxide film while selectively removing nitride film, and does not have issues that adversely affect the quality of the element, such particle generation, and is highly selective.

Etching composition, and method for producing semiconductor element by utilizing same

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