Over the past decade, the primary focus for improving the performance of nano-electronic metal interconnect structures has been to reduce the impact of resistance-capacitance (RC) delays via utilizing insulating dielectrics with ever lower values of dielectric permittivity. The integration and implementation of such low dielectric constant (i.e. low-k) materials has been fraught with numerous challenges. For intermetal and interlayer (ILD) low-k dielectrics, these challenges have been largely associated to integration with metal interconnect fabrication processes and well documented and reviewed in the literature. Although equally important, less attention has been given to other low-k dielectrics utilized in metal interconnect structures that are commonly referred to as low-k dielectric barriers (DB), etch stops (ES), and/or Cu capping layers (CCL). These materials present numerous challenges as well for integration into metal interconnect fabrication processes. However, they also have more stringent integrated functionality requirements relative to low-k ILD materials that serve only a basic purpose of electrically isolating adjacent metal lines. In this article, we review the integration challenges and associated integrated functionality requirements for low-k DB/ES/CCL materials with a focus on the current status and future direction needed for these materials to facilitate both Moore’s law (i.e. More Moore) and More than Moore scaling. © The Author(s) 2014. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution Non-Commercial No Derivatives 4.0 License (CC BY-NC-ND, http://creativecommons.org/licenses/by-nc-nd/4.0/), which permits non-commercial reuse, distribution, and reproduction in any medium, provided the original work is not changed in any way and is properly cited. For permission for commercial reuse, please email: oa@electrochem.org. [DOI: 10.1149/2.0051501jss] All rights reserved.

https://iopscience.iop.org/article/10.1149/2.0051501jss/pdf

Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

This research was supported by the Center for Advanced Molecular Photovoltaics (CAMP) supported by King Abdullah University of Science and Technology (KAUST) under award no. KUS-C1-015-21.

Decohesion Kinetics of PEDOT: PSS Conducting Polymer Films

JSS FOCUS ISSUE ON ADVANCED INTERCONNECTS :M ATERIALS ,P ROCESSING, AND RELIABILITY Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

We explore the application of a high-temperature precursor delivery system for depositing high boiling point organosilicate precursors on plastics using atmospheric plasma. Dense silica coatings were deposited on stretched poly(methyl methacrylate), polycarbonate and silicon substrates from the high boiling temperature precursor, 1, 2-bis(triethoxysilyl)ethane, and from two widely used low boiling temperature precursors, tetraethoxysilane and tetramethylcyclotetrasiloxane. The coating deposition rate, molecular network structure, density, Young’s modulus and adhesion to plastics exhibited a strong dependence on the precursor delivery temperature and rate, and the functionality and number of silicon atoms in the precursor molecules. The Young’s modulus of the coatings ranged from 6 to 34 GPa, depending strongly on the coating density. The adhesion of the coatings to plastics was affected by both the chemical structure of the precursor and the extent of exposure of the plastic substrate to the plasma during...

Atmospheric plasma deposited dense silica coatings on plastics.

The high temperature tribological behavior of Si, O containing hydrogenated diamond-like carbon (a-C:H/a-Si:O) coating against an aluminum alloy

Fracture properties of hydrogenated amorphous silicon carbide thin films

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Fracture properties of hydrogenated amorphous silicon carbide thin films