J. Schmidt
3 Papers
J. Schmidt is an academic researcher. The author has contributed to research in topics: Transistor & Salicide. The author has an hindex of 3, co-authored 3 publications.
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Papers
SiGe HBT with fx/fmax of 505 GHz/720 GHz
Bernd Heinemann,Holger Rucker,R. Barth,F. Barwolf,J. Drews,Gunter Fischer,A. Fox,O. Fursenko,Thomas Grabolla,Frank Herzel,Jens Katzer,J. Korn,A. Kruger,P. Kulse,T. Lenke,Marco Lisker,Steffen Marschmeyer,A. Scheit,D. Schmidt,J. Schmidt,M. A. Schubert,Andreas Trusch,C. Wipf,D. Wolansky +23 more
- 01 Dec 2016
TL;DR: An experimental SiGe HBT technology featuring fT/fmax/BVCEO = 505 GHz/720 GHz/1.6 V and a minimum CML ring oscillator gate delay of 1.34 ps is presented in this article.
193
Operation of sige HBTs at cryogenic temperatures
Holger Rucker,J. Korn,J. Schmidt +2 more
- 01 Oct 2017
TL;DR: In this article, the collector current at cryogenic temperatures is caused by electron tunneling through the base of a SiGe HBT, which reveals a transition from conventional thermally activated transport at room temperature to tunneling dominated transport at Cryogenic temperatures.
23
SiGe HBT technology with f T /f max of 300GHz/500GHz and 2.0 ps CML gate delay
Bernd Heinemann,R. Barth,D. Bolze,J. Drews,Gunter Fischer,A. Fox,O. Fursenko,Thomas Grabolla,Ulrich Haak,D. Knoll,R. Kurps,M. Lisker,Steffen Marschmeyer,H. Rucker,D. Schmidt,J. Schmidt,M. A. Schubert,Bernd Tillack,C. Wipf,D. Wolansky,Yuji Yamamoto +20 more
- 01 Dec 2010
TL;DR: In this paper, a SiGe HBT technology featuring f T /f max /BV CEO =300GHz/500GHz/1.6V and a minimum CML ring oscillator gate delay of 2.0 ps is presented.