This paper reviews the state of the art of field- programmable gate array (FPGA) design methodologies with a focus on industrial control system applications. This paper starts with an overview of FPGA technology development, followed by a presentation of design methodologies, development tools and relevant CAD environments, including the use of portable hardware description languages and system level programming/design tools. They enable a holistic functional approach with the major advantage of setting up a unique modeling and evaluation environment for complete industrial electronics systems. Three main design rules are then presented. These are algorithm refinement, modularity, and systematic search for the best compromise between the control performance and the architectural constraints. An overview of contributions and limits of FPGAs is also given, followed by a short survey of FPGA-based intelligent controllers for modern industrial systems. Finally, two complete and timely case studies are presented to illustrate the benefits of an FPGA implementation when using the proposed system modeling and design methodology. These consist of the direct torque control for induction motor drives and the control of a diesel-driven synchronous stand-alone generator with the help of fuzzy logic.

/pdf/fpga-design-methodology-for-industrial-control-systems-a-2kzb7fwd0q.pdf

FPGA Design Methodology for Industrial Control Systems—A Review

This survey deals with 1/f noise in homogeneous semiconductor samples. A distinction is made between mobility noise and number noise. It is shown that there always is mobility noise with an /spl alpha/ value with a magnitude in the order of 10/sup -4/. Damaging the crystal has a strong influence on /spl alpha/, /spl alpha/ may increase by orders of magnitude. Some theoretical models are briefly discussed none of them can explain all experimental results. The /spl alpha/ values of several semiconductors are given. These values can be used in calculations of 1/f noise in devices. >

1/f Noise Sources

The aim of this paper is to present the interest of implementing digital controllers using field-programmable gate array (FPGA) components. To this purpose, a variety of current control techniques, which is applied to alternating current machine drives, is designed and implemented. They consist of on-off current controllers, proportional-integral current controller, and predictive current controller. The quality of the regulated current is significantly improved. It is mainly due to a very important reduction of the execution time delay. Indeed, in all described techniques, the execution time of the designed hardware architectures is only a few microseconds. This time reduction derives directly from the possibility offered by FPGAs to design very powerful dedicated architectures. Numerous experimental results are given in order to illustrate the efficiency of FPGA-based solutions to achieve high-performance control of electrical systems.

FPGA-Based Current Controllers for AC Machine Drives—A Review

This article presents the benefits of using field-programmable gate array (FPGA)-based controllers for power electronics and drive applications. For this purpose, an algorithm perspective is first proposed, where it is stated that, depending on the intrinsic parallelism properties as well as level of complexity, it makes sense to implement each control algorithm on a specific hardware and/or software architecture to get the best performances in terms of execution time or the best ratio performance versus cost. Then, an application perspective is proposed where the constraints specifically linked to the control of power converters are discussed.

FPGA-based Controllers

The aim of this paper is to quantify the interest of using hardware field-programmable gate arrays (FPGAs) to implement complex control algorithms. As a benchmark, authors have chosen a sensorless speed controller for a synchronous motor. The estimation of the rotor position and speed is achieved using an extended Kalman filter (EKF), eliminating the need of their corresponding mechanical sensors. Due to the EKF complexity, such sensorless controller is systematically implemented in a software digital signal processor (DSP) device. The execution time is frequently evaluated to several tens or hundreds of microseconds. The motivation here is to prove that, when exploiting the treatment fastness of FPGAs (less than 6 μs ), it is possible to enhance the control bandwidth. To reach this objective, a comparison between the developed FPGA-based sensorless speed controller and its DSP-based counterpart is made. The same sensorless controller (with the same complexity) has been implemented in both cases. To prop up this comparison, simulation, hardware-in-the-loop, and experimental tests are presented.

/pdf/fully-fpga-based-sensorless-control-for-synchronous-ac-drive-23jx578ve6.pdf

Fully FPGA-Based Sensorless Control for Synchronous AC Drive Using an Extended Kalman Filter

In order to lower the short-circuit effect due to the measurement contacts, Vertical Hall Devices (VHDs) are generally designed either in bulky N-type silicon or in the deep N-well of high-voltage CMOS technologies. In this last case, VHD can benefit from on chip circuitry for offset and 1/f noise reduction, but HVCMOS remains a costly technology. Using spinning-current, HVCMOS compatible VHDs with a resolution of 76 μT rms over a 1.6-kHz bandwidth have been demonstrated. The VHD presented here is designed in the shallow N-well of a low-cost 0.35 μm standard CMOS technology. Unlike conventional VHD, its measurement contacts are located outside the sensor active area. FEM simulations and experimental results show that the new geometry suppresses the short-circuit effect and strongly reduces the intrinsic offset and noise. Thus, without any noise and offset reduction method, this new small VHD (63 μm 2 ) reaches a resolution of 79 μT rms over a (5 Hz–1.6 kHz) bandwidth, and opens the way to the integration of 3D Hall sensors in low-cost standard CMOS technologies.

First Vertical Hall Device in standard 0.35 μm CMOS technology

Current researches on CMOS integrated Hall devices focus on the vertical Hall device (VHD) since this structure limits the performances of monolithic three-dimensional Hall probes. The well known conventional horizontal Hall device (HHD) has probably been brought closed to its optimal performances while integrated in CMOS technologies. On the contrary, the VHD which is more complex to study theoretically still asks for a better understanding in order to improve its performances that are lower than those of a HHD as it was demonstrated experimentally in many previous works. The aim of this paper is to discuss this experimentally observed difference between VHD and HHD through an analysis of 2D FEM calculations. Especially, we explain why the conventional VHD with two sensing contacts exhibits an intrinsic lower sensitivity. This lower sensitivity is responsible for the lower signal to noise ratio and the higher offset. We also introduce coefficients which allow to determine the sensitivity of a VHD depending on its geometry. Finally we explain why a measurement of the Hall voltage through four sensing contacts instead of two is mandatory to reach the maximum sensitivity.

Intrinsic limits of the sensitivity of CMOS integrated vertical Hall devices

This paper presents a 3 dimensional magnetometer based on Hall effect sensors integrated without any post processing in a standard low cost 0.35 mum CMOS technology. The system is dedicated to magnetic pulses measurements under a strong static field. Two vertical Hall devices (VHD) are sensitive to the components of the magnetic field oriented in the plane of the chip, while a horizontal Hall device (HHD) is sensitive to the component of the magnetic field orthogonally oriented to the plane of the chip. 3 identical instrumental chains are integrated to perform amplification of the 3 Hall voltages. The system implements a compensation of the static magnetic field and allows to measure magnetic fields pulses with a resolution of 79 muT over a [5 Hz - 1.6 kHz] bandwidth. Pulses are in the range from hundreds of muT to tens of mT in the frequency range from 1 Hz to 10 kHz. The static field is compensated up to 1.5 T. The spatial resolution is 44 mum. The system power consumption has been optimized to 15 mW.

/pdf/3d-hall-probe-integrated-in-0-35-mm-cmos-technology-for-38x57ky0hj.pdf

3D Hall probe integrated in 0.35 μm CMOS technology for magnetic field pulses measurements

Latest developments in digital intelligent motion, as digital signal processors (DSPs), has strongly improved AC motor control performances. Application-specific-integrated circuit (ASIC) technology has changed the need for rapid process and low-cost processor. However, new technological problems appeared, requiring digital properties which need considering, such as quantization, sampling, word length and data types. The authors of this paper propose to study the quantization problems on ASIC-based direct torque control of an induction machine. They present a high level behavior model of the specific circuit and analyze the torque quantization errors. Finally, simulation results illustrate quantization influences on control performances with different data type solutions.

Quantization problem analysis on ASIC-based direct torque control of an induction machine

FPGA implementation by modular design reuse mode to optimize hardware architecture and performance of AC motor controller algorithm

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