In the last ten years, large improvements in the epitaxial silicon carbide processes have been made. The introduction of chloride precursors, the epitaxial growth on large area substrate with low defect density, the improvement of the surface morphology, the understanding of the chemical vapour deposition (CVD) reactions, and epitaxial mechanisms by advanced simulations are just the main results obtained in the homo-epitaxy process of 4H-SiC. After this large stride in the process of SiC epitaxial growth, it is time to collect this knowledge in a review that can be a reference point for the future work in this interesting field. The structure of the review is the following. After an introduction on the evolution and history of the epitaxial growth of 4H-SiC, the main physics parameter of this epitaxial growth process is explained in detail using the traditional Burton-Cabrera-Franck theory and the experimental observations of the surface instability due to the off-axis growths. Then the introduction of chlorinated precursors in the epitaxial process is reviewed and the effect of this new process on Schottky diodes characteristics is shown. The improvement of the epitaxy process is strictly related to the improvement of the simulation of the growth that helps the researchers to understand the effect of different parameters on such complex system. Then, a large part of the review is devoted to the simulations of the CVD systems, the reaction in the gas phase of the different precursors and the surface reaction models. Also, some important results obtained by Monte Carlo simulation on the study of different growth parameters that influence the formation of defects and their evolution are reported. Finally, the influence of different process parameters and in particular of the growth rate on the formation or the reduction of the principal defects that are observed in the epitaxial layer is reviewed. We have divided these defects in four categories: 3D defects (epi-stacking faults and inclusions), 2D defects (stacking faults), 1D defects (dislocations), and 0D defects (point defects). Also the influences of the growth parameters on the surface morphology (step-bunching) and the correlation with defects have been reviewed. In the conclusions the main results on the chloride epitaxy has been summarized and an outlook of this process in the next years has been presented with the actual understanding of the mechanism of the silicon carbide epitaxial growth.

Mechanisms of growth and defect properties of epitaxial SiC

The review article describes the interplay of fundamental research and advanced processes that have made SiC a unique semiconductor material for power electronic devices. Related to the outstanding physical properties of SiC, the preparation of this material is quite challenging. Processing is carried out at elevated temperatures that require special emphasis on the design of the growth machine and the applied construction materials. Growth inside a closed growth chamber demands the usage of advanced sensors and sophisticated computer simulation of the growth process. The application of advanced 2D and 3D in situ x-ray visualization techniques enables the visualization of the growth process. Reduction of the density of structural defects, a prerequisite for the technical application in power electronic devices, based on fundamental research and understanding of the crystallographic as well as the electronic properties of SiC beyond the knowledge base of standard semiconductor materials.

https://iopscience.iop.org/article/10.1088/1361-6641/aad831/pdf

Review of SiC crystal growth technology

Silicon carbide

Novel SiC wafer manufacturing process employing three-step slurryless electrochemical mechanical polishing

Dislocations are major structural defects in semiconductor materials, and they have negative impacts on the performance and reliability of electronic devices. The Burgers vector ( b → ) of a dislocation is one of the most important characteristics that determines its behavior in an operating device. In this study, we used synchrotron x-ray topography (XRT) to perform systematic observations of dislocations in β-Ga2O3, which is a promising wide-bandgap semiconductor for power device applications. By applying the g → ⋅ b → invisibility criterion to dislocation contrasts in XRTs taken at multiple reciprocal lattice vectors g →, we identified 12 types of Burgers vectors, including 11 types theoretically predicted by Yamaguchi et al. [Superlattice Microst. 99, 99 (2016)] and b → = ⟨ 100 ⟩. Some of these Burgers vectors, such as b → = ⟨ 10 1 ¯ ⟩ , 1 2 ⟨ 132 ⟩ , 1 2 ⟨ 1 3 ¯ 2 ⟩ , ⟨ 001 ⟩, and ⟨ 100 ⟩, were confirmed experimentally for the first time.

Identification of Burgers vectors of dislocations in monoclinic β-Ga2O3 via synchrotron x-ray topography

Basal plane slip is the most frequently observed deformation mechanism in 4H-type silicon carbon (4H-SiC) single crystals grown by the physical vapor transport (PVT) method. However, it was recently reported that dislocations in such crystals can also glide in prismatic slip systems. In this study, we observed nonuniform distributions of three sets of prismatic dislocations in a commercial 4H-SiC substrate wafer. The nonuniformity is a result of the distribution of resolved shear stress on each prismatic slip system caused by radial thermal gradients in the growing crystal boule. A radial thermal model has been developed to estimate the thermal stress across the entire area of the crystal boule during PVT growth. The model results show excellent agreement with the observations, confirming that radial thermal gradients play a key role in activating prismatic slip in 4H-SiC during bulk growth.

Prismatic Slip in PVT-Grown 4H-SiC Crystals

The commercial availability of high quality 150 mm 4H SiC wafers has aided in the growth of SiC power device fabrication. The progress of 150 mm 4H SiC wafer development at Dow Corning is reviewed. Defect densities compare well to those typical for 100 mm wafers, with even lower threading screw dislocation densities observed in 150 mm wafers. Resistivity data shows a comparable range from 0.012 – 0.025 ohm.cm, and excellent shape control is highlighted for wafer thicknesses of 350 μm and 500 μm.

High Quality 150 mm 4H SiC Wafers for Power Device Production

Progress in Bulk 4H SiC Crystal Growth for 150 mm Wafer Production

A method for producing silicon carbide substrates fit for epitaxial growth in a standard epitaxial chamber normally used for silicon wafers processing. Strict limitations are placed on any substrate that is to be processed in a chamber normally used for silicon substrates, so as to avoid contamination of the silicon wafers. To take full advantage of standard silicon processing equipment, the SiC substrates are of diameter of at least 150 mm. For proper growth of the SiC boule, the growth crucible is made to have interior volume that is six to twelve times the final growth volume of the boule. Also, the interior volume of the crucible is made to have height to width ratio of 0.8 to 4.0. Strict limits are placed on contamination, particles, and defects in each substrate.

Method for manufacturing SiC wafer fit for integration with power device manufacturing technology

With the increasing attention of 4H-silicon carbide (4H-SiC) crystals in the applications of high-power electronics, it has become necessary to further improve the development of the 4H-SiC crystal growth process, especially the initial stage of physical vapor transport (PVT) growth, which is a critical step to obtain high quality SiC crystals with polytype stability and low dislocation density. This paper describes a study on dislocation behavior of large diameter 4H-SiC crystals at the early stages of PVT growth. Synchrotron x-ray topography is applied to 6-inch PVT-grown crystals with a thickness of several hundred microns on 4H-SiC seeds. Grazing-incidence topographs in $$g = 11\overline{2}8$$
 and $$g = 1\overline{1}09$$
 recorded from both the seed crystal and newly grown layer show the presence of screw-type basal plane dislocations (BPDs) with $$b = 1/3\left[ {11\overline{2}0} \right]$$
 at the inner region of the wafers, which is further confirmed by comparing with ray tracing simulated images of these dislocations. Their origins are likely from deflection of threading edge dislocations (TEDs) onto the basal plane by the overgrowth of macro-steps. Pairs of threading screw/mixed dislocations (TSDs/TMDs) are found to be newly generated at the initial growth stage and some are deflected onto the basal plane. A high density of newly generated TEDs is observed in the early-grown crystals, which are either nucleated in pairs at the seed/crystal interface or converted from BPDs in the seed crystal. Furthermore, dislocations with unique shapes are observed and found to be associated with deflection of TMDs and TEDs, which become the major source for BPD generation during the early PVT growth stage. Possible models to explain their formation mechanism are developed.

Synchrotron X-ray Topography Studies of Dislocation Behavior During Early Stages of PVT Growth of 4H-SiC Crystals

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