The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI) manufacturing for leading edge Dynamic Random Access Memory (DRAM) and Complementary Metal Oxide Semiconductor (CMOS) applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM) diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD) is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing.

Emerging Applications for High K Materials in VLSI Technology

Memory organizations for 3D-DRAMs and PCMs in processor memory hierarchy

[ES]Con los limites tecnologicos de las tecnologias de semiconductores tradicionales alcanzando
los limites de escalado y integracion en chip, el descubrimiento del grafeno y sus
impresionantes propiedades supuso una prometedora alternativa para el futuro de la
electronica. Para contextualizar adecuadamente las posibilidades del grafeno, la investigacion
de las propiedades micrsocopicas del transporte electronico es una tarea crucial.
Con este objetivo, se ha desarrollado un simulador Monte Carlo para grafeno, que incluye
la dinamica de electrones y huecos, con espacial atencion a fenomenos de portadores
calientes, como fonones fuera de equilibrio, procesos Auger o generacion/recombinacion
asistida por fonones. El analisis del transporte electronico a campos altos permitio cuantificar
el impacto relativo del autocalentamiento y los fonones calientes sobre la velocidad
de deriva en condiciones estacionarias y la temperatura del material. Ademas se observo
un comportamiento lineal de la corriente debida a la ionizacion por impacto.
Se ha estudiado la fenomenologia relacionada con fluctuaciones empleando diversos
metodos numericos orientados a condiciones transitorias particulares (saltos abruptos de
campo o senales AC). La temperatura del ruido dependiente de la frecuencia se obtuvo
a partir de la difusividad y movilidad diferencial los portadores, y la viabilidad de la
generacion de armonicos de orden alto en grafeno se presenta en terminos del ancho de
banda limite para su deteccion.
El potencial del grafeno para aplicaciones optoelectronicas precisa de una comprension
detallada de los procesos de relajacion ultrarrapida que sufren los portadores fotoexcitados
con longitudes de onda apropiadas. Llevamos a cabo un examen exhaustivo de este
proceso, con especial atencion a las condiciones iniciales de fotoexcitacion, el papel de
los fonones calientes, y el efecto del sustrato.
Finalmente presentamos una version inicial de simulador para dispositivos electronicos
basados en materiales 2D, que cimentara las lineas futuras de investigacion en el campo
del modelado Monte Carlo de estos dispositivos.; [EN] With traditional semiconductor technology approaching the limits of scaling and chip
integration, the discovery of graphene and its astonishing properties stood as a promising
alternative for future electronics. In order to adequately put into context the possibilities
of graphene, it is critical to investigate the microscopic properties of electronic transport
in this material.
With this objective, a Monte Carlo simulator for graphene that includes the dynamics
of electrons and holes, with especial focus on hot carrier phenomena, like hot phonons,
Auger processes, and phonon-assisted generation and recombination mechanisms has
been developed. The analysis of electronic transport at high fields allowed to quantify
the relative impact that self heating and hot phonons have in the steady state drift
velocity of the carriers and temperature. Linear sheet current behavior at high fields was
found to be the result of free…

Out-of-Equilibrium Carrier Dynamics in Graphene and Graphene-based Devices for High-Performance Electronics

Plasma doping (PLAD), a high-throughput ion implantation technique capable of achieving ultrashallow junctions and conformal doping of 3-D structures such as fin field-effect transistors, is investigated as an alternative to conventional beam-line ion implantation for InGaAs at advanced technology nodes. The PLAD at an elevated substrate temperature (ET-PLAD) is studied and reported for InGaAs for the first time. The ET-PLAD can give lower sheet resistance than room-temperature PLAD due to enhanced dopant incorporation. More crucially, an ET can help to prevent amorphization. After dopant activation anneal, residual corner defects are observed in small fins that are amorphized during plasma ion implantation, whereas fins that remain crystalline during plasma ion implantation are free of corner defects.

Plasma Doping of InGaAs at Elevated Substrate Temperature for Reduced Sheet Resistance and Defect Formation

Con los limites tecnologicos de las tecnologias de semiconductores tradicionales alcanzando los limites de escalado y integracion en chip, el descubrimiento del grafeno y sus impresionantes propiedades supuso una prometedora alternativa para el futuro de la electronica. Para contextualizar adecuadamente las posibilidades del grafeno, la investigacion de las propiedades micrsocopicas del transporte electronico es una tarea crucial.
Con este objetivo, se ha desarrollado un simulador Monte Carlo para grafeno, que incluye la dinamica de electrones y huecos, con espacial atencion a fenomenos de portadores calientes, como fonones fuera de equilibrio, procesos Auger o generacion/recombinacion asistida por fonones.El analisis del transporte electronico a campos altos permitio cuantificar el impacto relativo del autocalentamiento y los fonones calientes sobre la velocidad de deriva en condiciones estacionarias y la temperatura del material. Ademas, se observo un comportamiento lineal de la corriente debida a la ionizacion por impacto. 
Se ha estudiado la fenomenologia relacionada con fluctuaciones empleando diversos metodos numericos orientados a condiciones transitorias particulares (saltos abruptos de campo o senales AC). La temperatura del ruido dependiente de la frecuencia se obtuvo a partir de la difusividad y movilidad diferencial los portadores, y la viabilidad de la generacion de armonicos de orden alto en grafeno se presenta en terminos del ancho de banda limite para su deteccion. 
El potencial del grafeno para aplicaciones optoelectronicas precisa de una comprension detallada de los procesos de relajacion ultrarrapida que sufren los portadores fotoexcitados con longitudes de onda apropiadas. Llevamos a cabo un examen exhaustivo de este proceso, con especial atencion a las condiciones iniciales de fotoexcitacion, el papel de los fonones calientes, y el efecto del sustrato. 
Finalmente presentamos una version inicial de simulador para dispositivos electronicos basados en materiales 2D, que cimentara las lineas futuras de investigacion en el campo del modelado Monte Carlo de estos dispositivos.

Out-of-equilibrium carrier dynamics in graphene and graphene-based devices

The superior transport properties of III–V materials are promising candidates to achieve improved performance at low power. This paper examines the module challenges of III–V materials in advanced CMOS at or beyond the 10 nm technology node, and reports VLSI compatible epi, junction, contact and gate stack process modules with Xj&#60;10nm, N D =5×1019 cm−3, ρ c = 6Ω.µm2 and Dit = 4×1012 eV−1 cm−2. Si VLSI fab and ESH protocols have been developed to enable advanced process flows.

Challenges of III–V materials in advanced CMOS logic

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Challenges of III–V materials in advanced CMOS logic