Multicast communication can greatly enhance the performance of Networks-on-Chip. Currently most multicast routing algorithms are either tree-based or path-based. The former has low latency but needs to solve multicast deadlocks through additional hardware resources. The latter can avoid deadlocks easily but may require long routing paths. In this paper we propose a hybrid multicast routing approach that combines the advantages of both path- and tree-based methods. The proposed approach ensures deadlock-free multicast routing without requiring additional virtual channels or large buffers to hold large packets. High routing performance is achieved using an adaptive routing strategy considering the traffic load in nearby routers. Two techniques, namely node balancing and path balancing, are further developed to enhance this hybrid routing algorithm. Extensive experiments with different buffer sizes, packet sizes and numbers of destinations per packet under random and Rent's rule traffic at various traffic injection rates have been conducted. The results show that the average latency of our approach is lower than previous multicast routing algorithms in most cases, and the saturation points of our approach are always at much higher injection rates.

A Hybrid Multicast Routing Approach with Enhanced Methods for Mesh-Based Networks-on-Chip

Application mapping of disseminated intellectual property into Network on Chip (NoC) is a well-defined NP-Hard problem. Improvement of network performance in NoC is purely based on an effective mapping approach with cost and performance metrics optimization which includes area, power, delay, reliability, and thermal distribution. A self-adaptive mapping approach for NoC is proposed in this paper. In this method, the self-adaptive chicken swarm optimization algorithm (SCSO) is used for an effective mapping, which has never been applied with NoC. The proposed method reduces the power consumption of NoC through a cognitive base using shared K-nearest neighbor clustering method and it offers faster mapping over standard and randomly generated benchmarks. The experimental results indicate that the proposed method outperforms existing bio-inspired metaheuristic algorithms, especially for large application graph.

/pdf/a-self-adaptive-mapping-approach-for-network-on-chip-with-3skbrztivj.pdf

A Self-Adaptive Mapping Approach for Network on Chip With Low Power Consumption

Due to increased demands for communication at low power, an efficient application mapping has become vital in the area of network on chip (NoC). Optimisation of architectural structure in on-chip design is essential to maximise the performance of the network and minimise the cost functions. To address this issue, a knowledge-based memetic algorithm (KBMA) is proposed for 3D NoC for successful mapping with standard network topologies. The proposed KBMA adopts power, area and delay as a cost function for an effective mapping. The competence of the proposed method is verified through comparison with other natural inspired algorithms like particle swarm optimisation and genetic algorithm. The presented work is validated through four case studies which include real application benchmarks of NoC and random generated benchmarks using test graph for free.

https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/iet-cdt.2018.5055

KBMA: A knowledge-based multi-objective application mapping approach for 3D NoC

Recently, three-dimensional Network-on-Chip (3D NoC) has been a promising transmission architecture for the communication requirement in Multiprocessor system-on-chips (MPSoCs) due to its capability of providing better scalability and higher throughput. The mode of information transmission in the network has significant impact on the overall system performance. Multicast routing can take advantage of the inherent parallelization offered by the MPSoCs to communicate the messages efficiently. However, the transmission latency is a bottleneck that has become a barrier to improve the performance. In this paper, to reduce the total transmission latency in the network, we propose an equilibrium partitioning method, which can obtain a tradeoff between the startup latency and the network latency to reduce the total transmission latency. The experiment results demonstrate that the proposed method can reduce the average latency by 18.3% at most than the previous recursive partitioning (RP) method, when the architecture is 16× 16× 3 mesh and the packet size is 15 flits. In addition, the scalability of the equilibrium partitioning method is better than the contrastive method.

An equilibrium partitioning method for multicast traffic in 3D NoC architecture

Multicast communication has been commonly used in multiprocessor systems. Current multicast routing methods such as tree-based and path-based approaches may suffer from the problem of multicast deadlocks or long routing delay. In this work we propose a hybrid multicast routing algorithm that combines the advantages of both path-based and tree-based methods. The proposed algorithm together with a router design that requires no additional virtual channel can achieve deadlock-free multicast routing. Very high routing efficiency is achieved by the proposed algorithm due to an adaptive routing strategy according to the traffic load. Experimental results show that the saturation point (in terms of injection ratio) of our algorithm is significantly higher than those of the state-of-the-art tree- and path-based multicast routing algorithms, while at the saturation points of these two algorithms, our algorithm has a routing latency that is 21% and 43% smaller than those of the tree- and the path-based algorithms, respectively.

An efficient deadlock-free multicast routing algorithm for mesh-based networks-on-chip

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An efficient deadlock-free multicast routing algorithm for mesh-based networks-on-chip