Data centers are critical, energy-hungry infrastructures that run large-scale Internet-based services. Energy consumption models are pivotal in designing and optimizing energy-efficient operations to curb excessive energy consumption in data centers. In this paper, we survey the state-of-the-art techniques used for energy consumption modeling and prediction for data centers and their components. We conduct an in-depth study of the existing literature on data center power modeling, covering more than 200 models. We organize these models in a hierarchical structure with two main branches focusing on hardware-centric and software-centric power models. Under hardware-centric approaches we start from the digital circuit level and move on to describe higher-level energy consumption models at the hardware component level, server level, data center level, and finally systems of systems level. Under the software-centric approaches we investigate power models developed for operating systems, virtual machines and software applications. This systematic approach allows us to identify multiple issues prevalent in power modeling of different levels of data center systems, including: i) few modeling efforts targeted at power consumption of the entire data center ii) many state-of-the-art power models are based on a few CPU or server metrics, and iii) the effectiveness and accuracy of these power models remain open questions. Based on these observations, we conclude the survey by describing key challenges for future research on constructing effective and accurate data center power models.

Data Center Energy Consumption Modeling: A Survey

The resource and power consumption of ICT is still increasing, but also the benefits of ICT, e.g. in finding more efficient solutions for environmental problems. To date, it is not clear, whether the resource and energy savings through ICT overbalance the resource and energy consumption by ICT, or not. Up to now, manifold efforts of Green IT address the environmental aspects of sustainability considering computer hardware. However, there is still a lack of models, descriptions or realizations in the area of computer software and software process models. In our contribution, we first propose definitions of the terms “Green and Sustainable Software” and “Green and Sustainable Software Engineering”, then we outline a conceptual reference model, the GREENSOFT Model. This model includes a cradle-to-grave product life cycle model for software products, sustainability metrics and criteria for software, software engineering extensions for sustainably sound software design and development, as well as appropriate guidance. 

The GREENSOFT Model: A reference model for green and sustainable software and its engineering

Accurate power characterization is important in computing platforms for several reasons ranging from poweraware adaptation to power provisioning. Power characterization is typically obtained through either direct measurements enabled by physical instrumentation or modeling based on hardware performance counters. We show, however, that linear-regression based modeling techniques commonly used in the literature work well only in restricted settings. These techniques frequently exhibit high prediction error in modern computing platforms due to inherent complexities such as multiple cores, hidden device states, and large dynamic power components.

Using a comprehensive measurement framework and an extensive set of benchmarks, we consider several more advanced modeling techniques and observe limited improvement. Our quantitative demonstration of the limitations of a variety of modeling techniques highlights the challenges posed by rising hardware complexity and variability and, thus, motivates the need for increased direct measurement of power consumption.

/pdf/evaluating-the-effectiveness-of-model-based-power-2fmwdf9165.pdf

Evaluating the effectiveness of model-based power characterization

Modern mobile and embedded devices are required to be increasingly energy-efficient while running more sophisticated tasks, causing the CPU design to become more complex and employ more energy-saving techniques. This has created a greater need for fast and accurate power estimation frameworks for both run-time CPU energy management and design-space exploration. We present a statistically rigorous and novel methodology for building accurate run-time power models using performance monitoring counters (PMCs) for mobile and embedded devices, and demonstrate how our models make more efficient use of limited training data and better adapt to unseen scenarios by uniquely considering stability. Our robust model formulation reduces multicollinearity, allows separation of static and dynamic power, and allows a $100{\times }$ reduction in experiment time while sacrificing only 0.6% accuracy. We present a statistically detailed evaluation of our model, highlighting and addressing the problem of heteroscedasticity in power modeling. We present software implementing our methodology and build power models for ARM Cortex-A7 and Cortex-A15 CPUs, with 3.8% and 2.8% average error, respectively. We model the behavior of the nonideal CPU voltage regulator under dynamic CPU activity to improve modeling accuracy by up to 5.5% in situations where the voltage cannot be measured. To address the lack of research utilizing PMC data from real mobile devices, we also present our data acquisition method and experimental platform software. We support this paper with online resources including software tools, documentation, raw data and further results.

/pdf/accurate-and-stable-run-time-power-modeling-for-mobile-and-9wu7zrjqcl.pdf

Accurate and Stable Run-Time Power Modeling for Mobile and Embedded CPUs

Fine-grained power management using process-level profiling

In the last few years the power dissipation problem of computer systems has attracted more and more attention. A lot of work has been done to decrease power dissipation and increase energy efficiency. We are still, however, not observing significant decrease of power dissipation. On the contrary, modern computer systems consume ever increasing amounts of energy. Where does the power go in a computer system is a question that many people are concerned with. Through comprehensive experiments and measurements, we observe several phenomenons that are in opposition to our common sense. Many people believe, for instance, that CPU utilization is a good indicator of the power dissipation of CPU. Our experiment results, however, show that CPU utilization is not an accurate reflection of the CPU power. Moreover, we discover that despite the performance improvements it introduces, cache could be a big problem for power reducing. Based on our observations we derive ten implications that are important for energy efficient system design.

Where does the power go in a computer system: Experimental analysis and implications

Battery lifetime, which is one of the most significant user experiences for mobile devices, strongly restricts the functional design of hardware architecture and applications. Among all the aspects of energy saving for mobile devices, energy-aware application design is one of the main areas that has not yet been explored comprehensively. In this paper, we argue for the case for energy-aware mobile application design since there is pretty large space for energy saving on applications and we believe this is a promising area for future energy saving on mobile devices. To support energy aware mobile application design, we propose a framework called Anole, aiming to add an energy adaptation layer by providing a set of APIs and adaptation policies. Our experiments with two applications on Android show that Anole is able to save a large amount of energy by triggering applications to change states accordingly.

Anole: A Case for Energy-Aware Mobile Application Design

Power behavior analysis of mobile applications using Bugu

For mobile devices, battery energy is the most precious resource. In the last decade, researchers have proposed various energy saving strategies from the system level to the hardware component level. In this paper, we explore how close to one week a smart phone running off of a single battery can last under normal usage. We first developed a battery lifetime prediction model that considers the influence of both user behavior and hardware components. Through experiments we analyzed the assumptions and the accuracy of the prediction model. We discussed the error rate of the estimated applications' power as well as its influence on the battery lifetime prediction. To analyze the impact generated by user behavior, we classify users into six types based on their application usage pattern. The theoretical battery life and potential extended battery time for each user type, with and without hardware improvement, have been illustrated. For example, compared with the original 66h (2.75 days) for users who rarely use their smartphone, we found that the battery life can be extended to 147h (more than 6 days) when we only maintain applications in the top three commonly used categories. Finally, several aspects, such as sleep frequency and background applications, that may affect prediction results are discussed.

One charge for one week: Hype or reality?

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