A method for fetching a content from a web server to a client device is disclosed, using tunnel devices serving as intermediate devices. The client device access an acceleration server to receive a list of available tunnel devices. The requested content is partitioned into slices, and the client device sends a request for the slices to the available tunnel devices. The tunnel devices in turn fetch the slices from the data server, and send the slices to the client device, where the content is reconstructed from the received slices. A client device may also serve as a tunnel device, serving as an intermediate device to other client devices. Similarly, a tunnel device may also serve as a client device for fetching content from a data server. The selection of tunnel devices to be used by a client device may be in the acceleration server, in the client device, or in both. The partition into slices may be overlapping or non-overlapping, and the same slice (or the whole content) may be fetched via multiple tunnel devices.

System and method for improving internet communication by using intermediate nodes

A system and a method for media streaming from multiple sources are disclosed. A content requesting client device accesses a server to receive a list of available sources that may include multiple Content Delivery Networks (CDNs) and independent servers. Based on a pre-set criteria, such as the source delivery performance and cost, the client device partitions the content into parts, allocates a source to each part, and simultaneously receives media streams of the content parts from the allocated sources. The server may be a Video-on-Demand (VOD) server, and the content may be a single file of a video data, such as a movie. The delivery performance of the used sources is measured during the streaming for updating the partition or the allocation. The updated measured performance may be stored locally at the client device, or at a server for use by other clients. The client actions may be implemented as a client-side script.

System and Method for Streaming Content from Multiple Servers

Method and system for improving the security of storing digital data in a memory or its delivery as a message over the Internet from a sender to a receiver using one or more hops is disclosed. The message is split at the sender into multiple overlapping or non-overlapping slices according to a slicing scheme, and the slices are encapsulated in packets each destined to a different relay server as an intermediate node according to a delivery scheme. The relay servers relay the received slices to another other relay server or to the receiver. Upon receiving all the packets containing all the slices, the receiver combines the slices reversing the slicing scheme, whereby reconstructing the message sent.

System and method for routing-based internet security

According to the present invention, techniques for performing security functions in computer storage subsystems in order to prevent illegal access by the host computers according to logical unit (LU) identity are provided. In representative embodiments management tables can be used to disclose the Logical Unit in the storage subsystem to the host computers in accordance with the users operational needs. In a specific embodiment, accessibility to a storage subsystem resource can be decided when an Inquiry Command is received, providing systems and apparatus wherein there is no further need to repeatedly determine accessibility for subsequent accesses to the Logical Unit. Many such embodiments can maintain relatively high performance, while providing robust security for each LU.

Security method and system for storage subsystem

A wireless communication device using a verification protocol for verifying the identification of the wireless device by a wireless network control station in the presence of eavesdroppers is disclosed. Upon receiving a call request from a wireless device claiming a particular identity, the wireless network control station sends a mask consisting of binary digits in a random order. The wireless device is expected to respond to this mask with a reply that is consistent with both the password contained in the device and the mask. Specifically, the bits of both the password and the mask are "ANDed" and the result transmitted to the wireless network control station as the reply.

Wireless device for verifying identification

A dual port RAM includes an arbiter (10) which interfaces between a random access memory (12) and two ports, a serial port (19) and a parallel port (21). The arbiter (10) has an internal arbitration byte (38) for storing status information. The arbiter operates in first and second modes. In the first mode, the serial port (19) is afforded priority access to the system with status information stored in the arbitration byte (38). The parallel port (21) polls the arbitration byte (38) to determine the system status. In the second mode, the first port to attempt access is provided priority and this information is stored in the arbitration byte (38). In this mode, each port attempting access must poll the arbitration byte (38) before attempting access.

Dual port ram with arbitration status register

A CPU (28) accesses remotely disposed RAM (12) through a common serial data link. The RAM is interfaced to the common data link under the control of an arbiter circuit (10). The arbiter includes a protocol shift register (31) for receiving control information, ID information, and address information for the RAM. The incoming ID information is compared with an ID template (37), and: If a match IS present: Read/Write access to the RAM is allowed, and Read/Write access to the ID template is allowed; If a match is NOT present: NO access to the RAM is allowed, Read-Only access to the ID template is allowed.

ID protected memory with a readable/writable ID template

Registered output circuitry for a memory device includes a first latch which stores data from a sense amplifier on the rising edge, and outputs it on the falling edge, of the falling edge of an OE signal. This data stored in the latch is provided as output of only y, during the preceding rising edge of the OE signal the CE signal to the memory device was a logical 0 level, and the WE signal was a logical 1 level. Since the falling edge of the OE signal is the beginning of the memory cycle, the data at the output pin of the memory is the data read in the previous read cycle. This latency, however, enables a shortened average cycle time, and also provides registered outputs without the necessity of an external clock signal applied to the memory device.

Registered outputs for a memory device

A remotely disposed RAM (12) is provided which is accessible by a centralized serial CPU (28) through a common data link. The RAM (12l ) is interfaced with the common data link through a serial port (19) and access thereto is controlled by an arbiter (10). The arbiter (10) includes a protocol shift register (31) for receiving control information, ID information and address information for the RAM (12). The ID information is compared with prestored identification information in an ID template (37). This ID template is operable to have a portion thereof masked off in response to receiving a mask command as part of the control information. If a match is present between the unmasked portion of the ID template and the corresponding portion of the ID information, access is allowed to the arbiter (10) and the RAM (12). A response is then transmitted to the common data link in the form of data read from the RAM.

ID protected memory with a maskable ID template

A low-power wireless data communication system, in which base stations (110) can automatically interface to batter-powered portable data modules (210) as they are brought within range. In the data modules (210), each receive antenna (121) is directly connected to a gain-controlled comparator (420A, 420B). Bandpass filtering (448) is accomplished economically by use of simple digital circuits. The two-level digital output from the comparator (420A, 420B) is fed (through an intersymbol detector, a counter, and a ripple-through magnitude comparator) to a state machine (552), which decodes the resulting digital waveform to a conventional serial-bus format. The internal data bus (701D) provides an interface to memory chips (262) and (optionally) to other chips, such as an electronic key. The decoder chip (220) also provides a secondary power supply to the other chips (230), and modulates the power supply (250) to assist detection of transitions on the reset-bar line of the serial bus (206). The modules (230) use widely different frequencies for read and write operations. (Transmissions by the base station (110) use a pulse-width modulation scheme where the most commonly used signals correspond to the shortest pulse. A 'read' command is encoded as the same pulse width as one of the two write commands). In addition, a pair of touch contacts (270) can be used to override the RF link. Error-checking (Fig. 7E) is performed on incoming commands before memory access (260) is permitted. 'Freshness seal' logic (510) prevents any battery drain until the module is initially turned on (by placing it in a strong field).

Micropowered rf data modules

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