The invention discloses a system and a method for controlling serialization of multiple types of data blocks by an FPGA (field programmable gate array). The system comprises an FPGA data processing module and a PC; the system also comprises a plurality of front end data modules and a PCIE control module; the front end data modules are used for acquiring front end data signals from a GPS satellite,converting radio frequency signals in the front end data signals into digital signals and outputting the digital front end data signals to the FPGA data processing module; and the FPGA data processing module and the PC carry out data transmission through the PCIE control module. The method uses the above described serialization control system to implement serialization control. The system and themethod for controlling serialization of multiple types of data blocks by the FPGA output the control state by adopting a universal serialization control mode so as to meet the acquisition of data blocks with various sizes.

System and method for controlling serialization of multiple types of data blocks by FPGA

The invention discloses a frequency spectrum self-adaptive high-performance communication system and a frequency spectrum self-adaptive high-performance communication method, wherein the system and method are suitable for multifunctional dynamic reconstruction and frequency spectrum self-adaptive high-performance communication of communication equipment in various occasions such as ground, aviation and spaceflight. The system mainly comprises a receiving antenna module, a down-conversion module, a digital channelization and processing evaluation module, a transmitting antenna module and a self-adaptive up-conversion module. Multiple functions such as a broadband frequency spectrum monitoring function, a signal analyzing and processing function and a communication function are combined andapplied in parallel; real-time frequency spectrum monitoring is realized in a large-bandwidth working frequency band by utilizing high-performance signal receiving capability, a current communicationlink is evaluated in real time; and when the link or a signal is interfered, communication parameters are adaptively selected and adjusted, so that frequency spectrum adaptive high-performance communication is realized. According to the invention, the frequency spectrum adaptive communication function is realized under the condition that the communication process is interfered, and the frequency spectrum resource utilization efficiency and the communication efficiency of satellite communication are improved.

Frequency spectrum self-adaptive high-performance communication system and method

The invention discloses a signal processing device and a signal processing method. The device is based on an FPGA platform and comprises a receiving module and a transmitting module, the receiving module receives and converts a plurality of first input signals and performs frequency reduction and screening on the plurality of converted first input signals to form a plurality of first output signals, and the receiving module sends the plurality of first output signals to the transmitting module; the transmitting module receives a plurality of second input signals, and upconverts the plurality of second input signals to obtain a plurality of second output signals; superposing the second output signals of the same class in the plurality of second output signals to obtain a plurality of thirdoutput signals; and superposing the same type of third output signals in the plurality of third output signals to obtain a plurality of fourth output signals, and performing frequency raising on the plurality of fourth output signals to obtain a plurality of fifth output signals, and converting the plurality of fifth output signals to obtain corresponding terminal output signals.

Signal processing device and signal processing method

The invention provides a Y-00 quantum noise stream encryption transmission method with a low bit error rate. The method comprises the steps that a transmitting end carries out the forward error correction coding of an information sequence modulated by BPSK through a generation matrix of a low-density parity check code, and obtains a coded information sequence; the sending end performs Y-00 encryption on bits in the coded information sequence bit by bit through the base sequence to obtain a plurality of encrypted coded information sequences; the sending end performs QAM modulation on the plurality of encrypted coded information sequences; the sending end performs OFDM modulation and parallel-serial conversion on each orthogonal subcarrier and transmits the orthogonal subcarriers; a receiving end receives the signals, and performs serial-parallel conversion and OFDM demodulation; the receiving end demodulates the plurality of orthogonal subcarriers QAM to obtain a plurality of encryptedcoded information sequences; the receiving end performs Y-00 decryption on the plurality of encrypted coded information sequences through the base sequence to obtain an information sequence subjectedto BPSK modulation; and the receiving end performs iterative computation through an LDPC FEC decoder to obtain an information sequence to be transmitted.

Y-00 quantum noise stream encryption transmission method with low bit error rate

The invention provides a digital channelized repeater based on an FPGA. The main function of a satellite repeater of the invention is to change and amplify a satellite signal and frequency, the satellite repeater forms a radio transceiver system together with a satellite transceiving antenna, the satellite repeater has the excellent performance of high sensitivity, large dynamic range, high test accuracy, long-term storage of digitized data and the like, meanwhile, the digitization and channelization are combined organically, the digital channelization is adopted, and the FPGA is used as a hardware platform of the design to achieve a stable and reliable spaceborne broadband digital channelized repeater that satisfies the function requirements. When the repeater is designed, the processingcapability of the repeater on broadband signals is considered, the signal transmission quality is improved, flexible channel switching and beam switching is realized, and approximate accurate analysisand synthesis of the broadband signals are achieved.

Digital channelized repeater system and digital channelized forwarding method based on FPGA

The invention discloses an anti-gray code mapping-based LDPC-Y-COFDM secure control method and system. The system mainly comprises three parts: an LDPC coder-decoder, an OFDM modem and a transceivingmodule. Innovatively, an anti-gray code mapping method is applied to a constellation mapping module of the COFDM system, a security gap of the COFDM system is reduced remarkably by maximizing different bits of adjacent codes, that is, in real communication environment, slight reduction of the quality of an intercepting channel may drive the bit error rate of an intercepting party to reach 0.4 or more, so that the communication is absolutely safe, the method and system are easy to realize and promote, have high security, provide a new thought for developing a method reducing system security gap, and have significance for communication secrecy of the COFDM system and promotion of practicability of the COFDM system.

Anti-gray code mapping-based LDPC-Y-COFDM secure control method and system

The invention relates to a method of processing in-band unevenness caused by DAC preprocessing, belonging to the technical field of digital communication. A zero-order retainer is adopted for a digital-to-analog converter (DAC), consequently, inherent attenuation in amplitude-frequency characteristic causes poor amplitude consistency in a bandwidth signal. In the method, a compensation method forpredistortion processing through a digital filter solves the inherent attenuation of the DAC, so that in-band evenness of a broadband signal is improved. Simulation results show that the method effectively relieves in-band unevenness of the broadband signal caused by DAC attenuation.

Method of processing in-band unevenness caused by DAC preprocessing

This paper presents an efficient compensation band limited digital predistortion (CBL-DPD) architecture for the wideband Orthogonal Frequency Division Multiplexing (OFDM) transmitter system. Compared with traditional band limited digital predistortion (BL-DPD), the CBL-DPD adds a low pass filter (LPF) and an error compensation term, which has lower complexity and higher precision. Simulation results show that the CBL-DPD can effectively overcome the nonlinearity and memory effect of the wideband power amplifier (PA).

A compensation band-limited digital predistortion for wideband power amplifiers

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Papers

Digital channelized repeater system and digital channelized forwarding method based on FPGA

Anti-gray code mapping-based LDPC-Y-COFDM secure control method and system

Method of processing in-band unevenness caused by DAC preprocessing

A compensation band-limited digital predistortion for wideband power amplifiers